📄 board.c
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/* * (C) Copyright 2000-2006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#include <common.h>#include <watchdog.h>#include <command.h>#include <malloc.h>#include <devices.h>#ifdef CONFIG_8xx#include <mpc8xx.h>#endif#ifdef CONFIG_5xx#include <mpc5xx.h>#endif#ifdef CONFIG_MPC5xxx#include <mpc5xxx.h>#endif#if defined(CONFIG_CMD_IDE)#include <ide.h>#endif#if defined(CONFIG_CMD_SCSI)#include <scsi.h>#endif#if defined(CONFIG_CMD_KGDB)#include <kgdb.h>#endif#ifdef CONFIG_STATUS_LED#include <status_led.h>#endif#include <net.h>#include <serial.h>#ifdef CFG_ALLOC_DPRAM#if !defined(CONFIG_CPM2)#include <commproc.h>#endif#endif#include <version.h>#if defined(CONFIG_BAB7xx)#include <w83c553f.h>#endif#include <dtt.h>#if defined(CONFIG_POST)#include <post.h>#endif#if defined(CONFIG_LOGBUFFER)#include <logbuff.h>#endif#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)#include <asm/cache.h>#endif#ifdef CONFIG_PS2KBD#include <keyboard.h>#endif#ifdef CFG_UPDATE_FLASH_SIZEextern int update_flash_size (int flash_size);#endif#if defined(CONFIG_SC3)extern void sc3_read_eeprom(void);#endif#if defined(CONFIG_CMD_DOC)void doc_init (void);#endif#if defined(CONFIG_HARD_I2C) || \ defined(CONFIG_SOFT_I2C)#include <i2c.h>#endif#if defined(CONFIG_CMD_NAND)void nand_init (void);#endifstatic char *failed = "*** failed ***\n";#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)extern flash_info_t flash_info[];#endif#if defined(CONFIG_START_IDE)extern int board_start_ide(void);#endif#include <environment.h>DECLARE_GLOBAL_DATA_PTR;#if defined(CFG_ENV_IS_EMBEDDED)#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \ (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ defined(CFG_ENV_IS_IN_NVRAM)#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)#else#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN#endifextern ulong __init_end;extern ulong _end;ulong monitor_flash_len;#if defined(CONFIG_CMD_BEDBUG)#include <bedbug/type.h>#endif/* * Begin and End of memory area for malloc(), and current "brk" */static ulong mem_malloc_start = 0;static ulong mem_malloc_end = 0;static ulong mem_malloc_brk = 0;/************************************************************************ * Utilities * ************************************************************************ *//* * The Malloc area is immediately below the monitor copy in DRAM */static void mem_malloc_init (void){#if !defined(CONFIG_RELOC_FIXUP_WORKS) mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off;#endif mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN; mem_malloc_brk = mem_malloc_start; memset ((void *) mem_malloc_start, 0, mem_malloc_end - mem_malloc_start);}void *sbrk (ptrdiff_t increment){ ulong old = mem_malloc_brk; ulong new = old + increment; if ((new < mem_malloc_start) || (new > mem_malloc_end)) { return (NULL); } mem_malloc_brk = new; return ((void *) old);}char *strmhz (char *buf, long hz){ long l, n; long m; n = hz / 1000000L; l = sprintf (buf, "%ld", n); m = (hz % 1000000L) / 1000L; if (m != 0) sprintf (buf + l, ".%03ld", m); return (buf);}/* * All attempts to come up with a "common" initialization sequence * that works for all boards and architectures failed: some of the * requirements are just _too_ different. To get rid of the resulting * mess of board dependend #ifdef'ed code we now make the whole * initialization sequence configurable to the user. * * The requirements for any new initalization function is simple: it * receives a pointer to the "global data" structure as it's only * argument, and returns an integer return code, where 0 means * "continue" and != 0 means "fatal error, hang the system". */typedef int (init_fnc_t) (void);/************************************************************************ * Init Utilities * ************************************************************************ * Some of this code should be moved into the core functions, * but let's get it working (again) first... */static int init_baudrate (void){ char tmp[64]; /* long enough for environment variables */ int i = getenv_r ("baudrate", tmp, sizeof (tmp)); gd->baudrate = (i > 0) ? (int) simple_strtoul (tmp, NULL, 10) : CONFIG_BAUDRATE; return (0);}/***********************************************************************/void __board_add_ram_info(int use_default){ /* please define platform specific board_add_ram_info() */}void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));static int init_func_ram (void){#ifdef CONFIG_BOARD_TYPES int board_type = gd->board_type;#else int board_type = 0; /* use dummy arg */#endif puts ("DRAM: "); if ((gd->ram_size = initdram (board_type)) > 0) { print_size (gd->ram_size, ""); board_add_ram_info(0); putc('\n'); return (0); } puts (failed); return (1);}/***********************************************************************/#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)static int init_func_i2c (void){ puts ("I2C: "); i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); puts ("ready\n"); return (0);}#endif/***********************************************************************/#if defined(CONFIG_WATCHDOG)static int init_func_watchdog_init (void){ puts (" Watchdog enabled\n"); WATCHDOG_RESET (); return (0);}# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,static int init_func_watchdog_reset (void){ WATCHDOG_RESET (); return (0);}# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,#else# define INIT_FUNC_WATCHDOG_INIT /* undef */# define INIT_FUNC_WATCHDOG_RESET /* undef */#endif /* CONFIG_WATCHDOG *//************************************************************************ * Initialization sequence * ************************************************************************ */init_fnc_t *init_sequence[] = {#if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f,#endif#if !defined(CONFIG_8xx_CPUCLK_DEFAULT) get_clocks, /* get CPU and bus clocks (etc.) */#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ && !defined(CONFIG_TQM885D) adjust_sdram_tbs_8xx,#endif init_timebase,#endif#ifdef CFG_ALLOC_DPRAM#if !defined(CONFIG_CPM2) dpram_init,#endif#endif#if defined(CONFIG_BOARD_POSTCLK_INIT) board_postclk_init,#endif env_init,#if defined(CONFIG_8xx_CPUCLK_DEFAULT) get_clocks_866, /* get CPU and bus clocks according to the environment variable */ sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ init_timebase,#endif init_baudrate, serial_init, console_init_f, display_options,#if defined(CONFIG_8260) prt_8260_rsr, prt_8260_clks,#endif /* CONFIG_8260 */#if defined(CONFIG_MPC83XX) prt_83xx_rsr,#endif checkcpu,#if defined(CONFIG_MPC5xxx) prt_mpc5xxx_clks,#endif /* CONFIG_MPC5xxx */#if defined(CONFIG_MPC8220) prt_mpc8220_clks,#endif checkboard, INIT_FUNC_WATCHDOG_INIT#if defined(CONFIG_MISC_INIT_F) misc_init_f,#endif INIT_FUNC_WATCHDOG_RESET#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) init_func_i2c,#endif#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ dtt_init,#endif#ifdef CONFIG_POST post_init_f,#endif INIT_FUNC_WATCHDOG_RESET init_func_ram,#if defined(CFG_DRAM_TEST) testdram,#endif /* CFG_DRAM_TEST */ INIT_FUNC_WATCHDOG_RESET NULL, /* Terminate this list */};/************************************************************************ * * This is the first part of the initialization sequence that is * implemented in C, but still running from ROM. * * The main purpose is to provide a (serial) console interface as * soon as possible (so we can see any error messages), and to * initialize the RAM so that we can relocate the monitor code to * RAM. * * Be aware of the restrictions: global data is read-only, BSS is not * initialized, and stack space is limited to a few kB. * ************************************************************************ */void board_init_f (ulong bootflag){ bd_t *bd; ulong len, addr, addr_sp; ulong *s; gd_t *id; init_fnc_t **init_fnc_ptr;#ifdef CONFIG_PRAM int i; ulong reg; uchar tmp[64]; /* long enough for environment variables */#endif /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory");#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t));#endif for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr) () != 0) { hang (); } } /* * Now that we have DRAM mapped and working, we can * relocate the code and continue running from DRAM. * * Reserve memory at end of RAM for (top down in that order): * - kernel log buffer * - protected RAM * - LCD framebuffer * - monitor code * - board info struct */ len = (ulong)&_end - CFG_MONITOR_BASE;#ifndef CONFIG_VERY_BIG_RAM addr = CFG_SDRAM_BASE + gd->ram_size;#else /* only allow stack below 256M */ addr = CFG_SDRAM_BASE + (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;#endif#ifdef CONFIG_LOGBUFFER /* reserve kernel log buffer */ addr -= (LOGBUFF_RESERVE); debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);#endif#ifdef CONFIG_PRAM /* * reserve protected RAM */ i = getenv_r ("pram", (char *)tmp, sizeof (tmp)); reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM; addr -= (reg << 10); /* size is in kB */ debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);#endif /* CONFIG_PRAM */ /* round down to next 4 kB limit */ addr &= ~(4096 - 1); debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);#ifdef CONFIG_LCD /* reserve memory for LCD display (always full pages) */ addr = lcd_setmem (addr); gd->fb_base = addr;#endif /* CONFIG_LCD */#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) /* reserve memory for video display (always full pages) */ addr = video_setmem (addr); gd->fb_base = addr;#endif /* CONFIG_VIDEO */ /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit */ addr -= len; addr &= ~(4096 - 1);#ifdef CONFIG_E500 /* round down to next 64 kB limit so that IVPR stays aligned */ addr &= ~(65536 - 1);#endif debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);#ifdef CONFIG_AMIGAONEG3SE gd->relocaddr = addr;#endif /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; debug ("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= sizeof (bd_t); bd = (bd_t *) addr_sp; gd->bd = bd; debug ("Reserving %d Bytes for Board Info at: %08lx\n", sizeof (bd_t), addr_sp); addr_sp -= sizeof (gd_t); id = (gd_t *) addr_sp; debug ("Reserving %d Bytes for Global Data at: %08lx\n", sizeof (gd_t), addr_sp); /* * Finally, we set up a new (bigger) stack. * * Leave some safety gap for SP, force alignment on 16 byte boundary * Clear initial stack frame */ addr_sp -= 16; addr_sp &= ~0xF; s = (ulong *)addr_sp; *s-- = 0; *s-- = 0; addr_sp = (ulong)s; debug ("Stack Pointer at: %08lx\n", addr_sp); /* * Save local variables to board info struct */ bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */ bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */#ifdef CONFIG_IP860 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */#elif defined CONFIG_MPC8220 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */ bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */#else bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */#endif#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ defined(CONFIG_E500) || defined(CONFIG_MPC86xx) bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */#endif#if defined(CONFIG_MPC5xxx) bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */#endif#if defined(CONFIG_MPC83XX) bd->bi_immrbar = CFG_IMMR;#endif#if defined(CONFIG_MPC8220) bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ bd->bi_inpfreq = gd->inp_clk; bd->bi_pcifreq = gd->pci_clk; bd->bi_vcofreq = gd->vco_clk; bd->bi_pevfreq = gd->pev_clk; bd->bi_flbfreq = gd->flb_clk; /* store bootparam to sram (backward compatible), here? */ { u32 *sram = (u32 *)CFG_SRAM_BASE; *sram++ = gd->ram_size; *sram++ = gd->bus_clk; *sram++ = gd->inp_clk; *sram++ = gd->cpu_clk; *sram++ = gd->vco_clk; *sram++ = gd->flb_clk; *sram++ = 0xb8c3ba11; /* boot signature */ }#endif bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ WATCHDOG_RESET (); bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */#if defined(CONFIG_CPM2) bd->bi_cpmfreq = gd->cpm_clk; bd->bi_brgfreq = gd->brg_clk; bd->bi_sccfreq = gd->scc_clk; bd->bi_vco = gd->vco_out;#endif /* CONFIG_CPM2 */#if defined(CONFIG_MPC5xxx) bd->bi_ipbfreq = gd->ipb_clk; bd->bi_pcifreq = gd->pci_clk;#endif /* CONFIG_MPC5xxx */ bd->bi_baudrate = gd->baudrate; /* Console Baudrate */#ifdef CFG_EXTBDINFO strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ bd->bi_plb_busfreq = gd->bus_clk;#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) bd->bi_pci_busfreq = get_PCI_freq (); bd->bi_opbfreq = get_OPB_freq ();#elif defined(CONFIG_XILINX_ML300) bd->bi_pci_busfreq = get_PCI_freq ();#endif#endif debug ("New Stack Pointer is: %08lx\n", addr_sp); WATCHDOG_RESET ();#ifdef CONFIG_POST post_bootmode_init(); post_run (NULL, POST_ROM | post_bootmode_get(0));#endif WATCHDOG_RESET(); memcpy (id, (void *)gd, sizeof (gd_t)); relocate_code (addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */}/************************************************************************ * * This is the next part if the initialization sequence: we are now * running from RAM and have a "normal" C environment, i. e. global * data can be written, BSS has been cleared, the stack size in not * that critical any more, etc. * ************************************************************************ */void board_init_r (gd_t *id, ulong dest_addr){ cmd_tbl_t *cmdtp; char *s, *e; bd_t *bd; int i; extern void malloc_bin_reloc (void);#ifndef CFG_ENV_IS_NOWHERE extern char * env_name_spec;#endif#ifndef CFG_NO_FLASH ulong flash_size;#endif gd = id; /* initialize RAM version of global data */ bd = gd->bd;
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