reg5409.h

TMS320VC54XX的寄存器操作的头的模型

#ifndef	__reg5409_H__
#define	__reg5409_H__

//--------------------------------------------------------
//Registers operation head file for 5409
//Device:TMS320VC5409
//mubo
//2006.3.23
//--------------------------------------------------------


//---------------------------------------------------------
//define two structs and a union just with the two structs;

#define	Uint	unsigned int
typedef struct
{
	Uint bit15 : 1;
	Uint bit14 : 1;
	Uint bit13 : 1;
	Uint bit12 : 1;
	Uint bit11 : 1;
	Uint bit10 : 1;
	Uint bit9  : 1;
	Uint bit8  : 1;
	Uint bit7  : 1;
	Uint bit6  : 1;
	Uint bit5  : 1;
	Uint bit4  : 1;
	Uint bit3  : 1;
	Uint bit2  : 1;
	Uint bit1  : 1;
	Uint bit0  : 1;
}Bit;

typedef struct
{
	Uint byteh  : 8;
	Uint bytel  : 8;
}Byte;

typedef struct
{
    Uint reserve : 4;
    Uint Soft : 1;
    Uint Free : 1;
    Uint PSC  : 4;
    Uint TRB  : 1;
    Uint TSS  : 1;
    Uint TDDR : 4;
}Tcr;

typedef union
{
	Bit bit;
	Byte byte;
	Tcr tcr;
	Uint word;
}UNreg;

//----------------------------------------------------
//define the registers addresses as unioned points use the union above;

#define R_imr      ((volatile UNreg *)(0x00))
#define R_ifr      ((volatile UNreg *)(0x01))
#define R_st0      ((volatile UNreg *)(0x06))
#define R_st1      ((volatile UNreg *)(0x07))

#define R_pmst      ((volatile UNreg *)(0x1D))

#define R_drr20    ((volatile UNreg *)(0x20))
#define R_drr10    ((volatile UNreg *)(0x21))
#define R_dxr20    ((volatile UNreg *)(0x22))
#define R_dxr10    ((volatile UNreg *)(0x23))
#define R_tim      ((volatile UNreg *)(0x24))
#define R_prd      ((volatile UNreg *)(0x25))
#define R_tcr      ((volatile UNreg *)(0x26))
#define R_swwsr    ((volatile UNreg *)(0x28))
#define R_bscr     ((volatile UNreg *)(0x29))
#define R_swcr     ((volatile UNreg *)(0x2B))
#define R_hpic     ((volatile UNreg *)(0x2C))
#define R_drr22    ((volatile UNreg *)(0x30))
#define R_drr12    ((volatile UNreg *)(0x31))
#define R_dxr22    ((volatile UNreg *)(0x32))
#define R_dxr12    ((volatile UNreg *)(0x33))
#define R_spsa2    ((volatile UNreg *)(0x34))
#define R_spsd2    ((volatile UNreg *)(0x35))
#define R_spsa0    ((volatile UNreg *)(0x38))
#define R_spsd0    ((volatile UNreg *)(0x39))
#define R_gpiocr   ((volatile UNreg *)(0x3C))
#define R_gpiosr   ((volatile UNreg *)(0x3D))
#define R_drr21    ((volatile UNreg *)(0x40))
#define R_drr11    ((volatile UNreg *)(0x41))
#define R_dxr21    ((volatile UNreg *)(0x42))
#define R_dxr11    ((volatile UNreg *)(0x43))
#define R_spsa1    ((volatile UNreg *)(0x48))
#define R_spsd1    ((volatile UNreg *)(0x49))
#define R_dmprec   ((volatile UNreg *)(0x54))
#define R_dmsa     ((volatile UNreg *)(0x55))
#define R_dmsdi    ((volatile UNreg *)(0x56))
#define R_dmsdn    ((volatile UNreg *)(0x57))
#define R_clkmd    ((volatile UNreg *)(0x58))


#define Status1     R_st1->word
#define IntMask     R_imr->word    //interrupt mask;
#define IntFlag     R_ifr->word    //interrupt flag;
#define Timer       R_tim->word    //timer;
#define TimerPrd    R_prd->word    //timer period;
#define TimerCtrl   R_tcr->word    //timer control;

#define GpioCtrl    R_gpiocr->word    //GPIO control;
#define GpioStatus  R_gpiosr->word    //GPIO status;

#define ClockMode   R_clkmd->word    //clock mode(correlate with PLL);



//---------------------------------------------------
//bit operation of registers

//#define INT_EN     R_st1->bit.bit11      //the main enable of interrupt;warning!!:the main enable of interrupt couldn't be seted use the memoried operation for example write the bit or write the address;

//bit operation of Interrupt mask register and flag register
#define DMAC5_Mask    R_imr->bit.bit13      //bits of interrupter mask and flag register;
#define DMAC5_Flag    R_ifr->bit.bit13      //DMA channel 5 interrupt
#define DMAC4_Mask    R_imr->bit.bit12
#define DMAC4_Flag    R_ifr->bit.bit12
#define DMAC3_Mask    R_imr->bit.bit11
#define DMAC3_Flag    R_ifr->bit.bit11
#define DMAC2_Mask    R_imr->bit.bit10
#define DMAC2_Flag    R_ifr->bit.bit10
#define BXINT1_Mask   R_imr->bit.bit11      //McBSP1 transmit interrupt
#define BXINT1_Flag   R_ifr->bit.bit11
#define BRINT1_Mask   R_imr->bit.bit10      //McBSP1 receive interrupt
#define BRINT1_Flag   R_ifr->bit.bit10
#define HINT_Mask     R_imr->bit.bit9       //Host to 54x interrupt
#define HINT_Flag     R_ifr->bit.bit9
#define INT3_Mask     R_imr->bit.bit8
#define INT3_Flag     R_ifr->bit.bit8       //external interrupt 3
#define DMAC1_Mask    R_imr->bit.bit7
#define DMAC1_Flag    R_ifr->bit.bit7
#define DMAC0_Mask    R_imr->bit.bit6
#define DMAC0_Flag    R_ifr->bit.bit6
#define BXINT2_Mask   R_imr->bit.bit7
#define BXINT2_Flag   R_ifr->bit.bit7
#define BRINT2_Mask   R_imr->bit.bit6
#define BRINT2_Flag   R_ifr->bit.bit6
#define BXINT0_Mask   R_imr->bit.bit5
#define BXINT0_Flag   R_ifr->bit.bit5
#define BRINT0_Mask   R_imr->bit.bit4
#define BRINT0_Flag   R_ifr->bit.bit4
#define TINT_Mask     R_imr->bit.bit3       //timer interrupt
#define TINT_Flag     R_ifr->bit.bit3
#define INT2_Mask     R_imr->bit.bit2
#define INT2_Flag     R_ifr->bit.bit2
#define INT1_Mask     R_imr->bit.bit1
#define INT1_Flag     R_ifr->bit.bit1
#define INT0_Mask     R_imr->bit.bit0
#define INT0_Flag     R_ifr->bit.bit0

#define TimerReload   R_tcr->tcr.TRB      //timer reload bit,"1":load Timer with TimerPrd and load PSC with TDDR.The bit always be readed as "0";
#define TimerPSC      R_tcr->tcr.PSC      //prescaler conter bit;
#define TimerTDDR     R_tcr->tcr.TDDR     //timer divide-down ratio;
#define TimerStop     R_tcr->tcr.TSS      //timer stop status bit, TSS = 0 :timer start work,TSS = 1 :timer stop work;
#define TimerBreakFree   R_tcr->tcr.Free  //when breakpoint, Free = 1 :timer runs free,Free = 0 :the attribute determined by Soft;
#define TimerBreakSoft   R_tcr->tcr.Soft  //Soft = 1 :timer stops when the conter decrements to 0, Soft = 0 :timer stops immediately;

#define XF      R_st1->bit.bit13



#endif