main.c

一个很全面的TMS320F2812的最小系统的工程

    PieCtrlRegs.PIEIER9.bit.INTx2=1;
    PieCtrlRegs.PIEIER9.bit.INTx5=1;
    PieCtrlRegs.PIEIER9.bit.INTx6=1;
	
}
//---------------------------------------------------------------------------
// InitSysCtrl: 
//---------------------------------------------------------------------------
// This function initializes the System Control registers to a known state.
//
void sInitSysCtrl(void)
{
   unsigned int i;
   EALLOW;
   
// On TMX samples, to get the best performance of on chip RAM blocks M0/M1/L0/L1/H0 internal
// control registers bit have to be enabled. The bits are in Device emulation registers.
   DevEmuRegs.M0RAMDFT = 0x0300;
   DevEmuRegs.M1RAMDFT = 0x0300;
   DevEmuRegs.L0RAMDFT = 0x0300;
   DevEmuRegs.L1RAMDFT = 0x0300;
   DevEmuRegs.H0RAMDFT = 0x0300;
   
           
// Disable watchdog module
   SysCtrlRegs.WDCR= 0x0068;

// Initalize PLL
   SysCtrlRegs.PLLCR = 0xA;
   // Wait for PLL to lock
   for(i= 0; i< 5000; i++){}
       
// HISPCP/LOSPCP prescale register settings.
// high speed clock = SYSCLKOUT/1 (EVA,EVB,ADC)
   SysCtrlRegs.HISPCP.all = 0x0000;
// low speed clock = SYSCLKOUT/4  (SCIA,SCIB,SPI,McBSP)
   SysCtrlRegs.LOSPCP.all = 0x0002;	
// Peripheral clock enables set for the selected peripherals.   
   SysCtrlRegs.PCLKCR.bit.EVAENCLK=1;
   SysCtrlRegs.PCLKCR.bit.EVBENCLK=1;
   SysCtrlRegs.PCLKCR.bit.SCIENCLKA=1;
   SysCtrlRegs.PCLKCR.bit.SCIENCLKB=0;
   SysCtrlRegs.PCLKCR.bit.MCBSPENCLK=0;
   SysCtrlRegs.PCLKCR.bit.SPIENCLK=1;
   SysCtrlRegs.PCLKCR.bit.ECANENCLK=1;
   SysCtrlRegs.PCLKCR.bit.ADCENCLK=1;
   EDIS;
	
}

// This function initializes the Flash Control registers

//                   CAUTION 
// This function MUST be executed out of RAM. Executing it
// out of OTP/Flash will yield unpredictable results

void sInitFlash(void)
{
   EALLOW;
   //Enable Flash Pipeline mode to improve performance
   //of code executed from Flash.
   FlashRegs.FOPT.bit.ENPIPE = 1;
   
   //                CAUTION
   //Minimum waitstates required for the flash operating
   //at a given CPU rate must be characterized by TI. 
   //Refer to the datasheet for the latest information.  

   //Set the Random Waitstate for the Flash
   FlashRegs.FBANKWAIT.bit.RANDWAIT = 5;//lg/030905 5;
   
   //Set the Paged Waitstate for the Flash
   FlashRegs.FBANKWAIT.bit.PAGEWAIT = 5;//lg/030905 5;
   
   //                CAUTION
   //Minimum cycles required to move between power states
   //at a given CPU rate must be characterized by TI. 
   //Refer to the datasheet for the latest information.
     
   //For now use the default count
   
   //Set number of cycles to transition from sleep to standby
   FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF;       
   
   //Set number of cycles to transition from standby to active
   FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF;   
   EDIS;
}	


//---------------------------------------------------------------------------
// KickDog: 
//---------------------------------------------------------------------------
// This function resets the watchdog timer.
// Enable this function for using KickDog in the application 
/*
void sKickDog(void)
{
    EALLOW;
    SysCtrlRegs.WDKEY = 0x0055;
    SysCtrlRegs.WDKEY = 0x00AA;
    EDIS;
}
*/
//---------------------------------------------------------------------------
// InitAdc: 
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
void sInitAdc(void)
{
    extern void DSP28x_usDelay(unsigned long Count);
	
    // To powerup the ADC the ADCENCLK bit should be set first to enable
    // clocks, followed by powering up the bandgap and reference circuitry.
    // After a 5ms delay the rest of the ADC can be powered up. After ADC
    // powerup, another 20us delay is required before performing the first
    // ADC conversion. Please note that for the delay function below to
    // operate correctly the CPU_CLOCK_SPEED define statement in the
    // DSP28_Device.h file must contain the correct CPU clock period in
    // nanoseconds. For example:
    //
    // #define CPU_CLOCK_SPEED  6.6667L // for a 150MHz CPU clock speed
	
    //This was done in the InitSysCtrl() function in DSP28_SysCtrl.c
    //asm("	EALLOW");
    //SysCtrlRegs.PCLKCR.bit.ADCENCLK = 1;     // Power up clocks to ADC
    //SysCtrlRegs.WDCR = 0x6F;                 // Disable WD
    //asm("	EDIS");
/*** Reset the ADC module ***/
	AdcRegs.ADCTRL1.bit.RESET = 1;		// Reset the ADC module
	asm(" RPT #20 || NOP");				// Must wait 12-cycles (worst-case) for ADC reset to take effect // for test ywt/061214A

	AdcRegs.ADCTRL3.all = 0x00C6;		// first power-up ref and bandgap circuits
    	
    //AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3;// Power up bandgap/reference circuitry
	DelayUs(10000);				//According to spru060b(200407).pdf which the latest user guild , wait 7ms before setting ADCPWDN//lg/040803 // for test ywt/061214A
	AdcRegs.ADCTRL3.bit.ADCPWDN = 1;	// Set ADCPWDN=1 to power main ADC
	DelayUs(200);				// Wait 20us before using the ADC

/*
    AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3;// Power up bandgap/reference circuitry
    DELAY_US(ADC_usDELAY);              // Delay before powering up rest of ADC
    AdcRegs.ADCTRL3.bit.ADCPWDN = 1;	// Power up rest of ADC
    DELAY_US(ADC_usDELAY2);             // Delay after powering up ADC
*/

    AdcRegs.ADCMAXCONV.all=0x000F;
    AdcRegs.ADCCHSELSEQ1.all=0x3210;
    AdcRegs.ADCCHSELSEQ2.all=0x7654;
    AdcRegs.ADCCHSELSEQ3.all=0xBA98;
    AdcRegs.ADCCHSELSEQ4.all=0xFEDC;
	
    //Initial ADC: reset ADC, Set Acquisition window size = 0,so the width of SOC
    //pulse is 1, Fclk is selected as CLK/1, Start-stop mode,Cascaded mode
    //AdcRegs.ADCTRL1.bit.RESET=1;
    //AdcRegs.ADCTRL1.all = 0x2710;
    AdcRegs.ADCTRL1.all=0x2010;	//0x4010;
    // diable EVB trigger ADC, Reset Seq1,Reset Seq2, Disable ADC Interrupt
    //AdcRegs.ADCTRL2.all=0x4040;
    //AdcRegs.ADCTRL2.all = 0x0900;
    //AdcRegs.ADCTRL2.bit.RST_SEQ1=1;
    //AdcRegs.ADCTRL2.all=0x4000;
}	

//---------------------------------------------------------------------------
// InitGpio: 
//---------------------------------------------------------------------------
// This function initializes the Gpio to a known state.
//
void sInitGpio(void)
{

// Set GPIO A port pins,AL(Bits 7:0)(input)-AH(Bits 15:8) (output) 8bits
// Input Qualifier =0, none
    EALLOW;
    GpioMuxRegs.GPAMUX.all=0x07FF;
    GpioMuxRegs.GPADIR.all=0xE000;  
    GpioMuxRegs.GPAQUAL.all=0x00FF;	// sync clock/510

    GpioMuxRegs.GPBMUX.all=0x077F;  // ywt/061208C   
    GpioMuxRegs.GPBDIR.all=0xE080;
    GpioMuxRegs.GPBQUAL.all=0x00FF;	// Input qualifier disabled

    GpioMuxRegs.GPDMUX.all=0x0000;	//0x0021;	lg/040203
    GpioMuxRegs.GPDDIR.all=0x0063;	//0x0042;	lg/040203
    GpioMuxRegs.GPDQUAL.all=0x0000;

    GpioMuxRegs.GPEMUX.all=0x0001;
    GpioMuxRegs.GPEDIR.all=0x0000;
    GpioMuxRegs.GPEQUAL.all=0x0000;
    
//    GpioMuxRegs.GPFMUX.all=0x00FF;
//    GpioMuxRegs.GPFDIR.all=0xFF00;
    GpioMuxRegs.GPFMUX.all=0x00F7; //ywt/070322A for software control SPI CS line
    GpioMuxRegs.GPFDIR.all=0xFF08; //ywt/070322A for software control SPI CS line

//    GpioMuxRegs.GPFQUAL.all=0x0000;

    GpioMuxRegs.GPGMUX.all=0x0030;
    GpioMuxRegs.GPGDIR.all=0x0000;
//    GpioMuxRegs.GPGQUAL.all=0x0000;
    
    EDIS;    
}	

//---------------------------------------------------------------------------
// InitPieCtrl: 
//---------------------------------------------------------------------------
// This function initializes the PIE control registers to a known state.
//
void sInitPieCtrl(void)
{
	// Disable PIE:
	PieCtrlRegs.PIECRTL.bit.ENPIE = 0;

	// Clear all PIEIER registers:
	PieCtrlRegs.PIEIER1.all = 0;
	PieCtrlRegs.PIEIER2.all = 0;
	PieCtrlRegs.PIEIER3.all = 0;	
	PieCtrlRegs.PIEIER4.all = 0;
	PieCtrlRegs.PIEIER5.all = 0;
	PieCtrlRegs.PIEIER6.all = 0;
	PieCtrlRegs.PIEIER7.all = 0;
	PieCtrlRegs.PIEIER8.all = 0;
	PieCtrlRegs.PIEIER9.all = 0;
	PieCtrlRegs.PIEIER10.all = 0;
	PieCtrlRegs.PIEIER11.all = 0;
	PieCtrlRegs.PIEIER12.all = 0;

	// Clear all PIEIFR registers:
	PieCtrlRegs.PIEIFR1.all = 0;
	PieCtrlRegs.PIEIFR2.all = 0;
	PieCtrlRegs.PIEIFR3.all = 0;	
	PieCtrlRegs.PIEIFR4.all = 0;
	PieCtrlRegs.PIEIFR5.all = 0;
	PieCtrlRegs.PIEIFR6.all = 0;
	PieCtrlRegs.PIEIFR7.all = 0;
	PieCtrlRegs.PIEIFR8.all = 0;
	PieCtrlRegs.PIEIFR9.all = 0;
	PieCtrlRegs.PIEIFR10.all = 0;
	PieCtrlRegs.PIEIFR11.all = 0;
	PieCtrlRegs.PIEIFR12.all = 0;

	// Enable PIE:
	PieCtrlRegs.PIECRTL.bit.ENPIE = 1;
	PieCtrlRegs.PIEACK.all = 0xFFFF;
}	

//---------------------------------------------------------------------------
// InitPieVectTable: 
//---------------------------------------------------------------------------
// This function initializes the PIE vector table to a known state.
// This function must be executed after boot time.
//

void sInitPieVectTable(void)
{
	int	i;
	unsigned long *Source = (void *) &PieVectTableInit;
	unsigned long *Dest = (void *) &PieVectTable;
		
	EALLOW;	
	for(i=0; i < 128; i++)
		*Dest++ = *Source++;	
	EDIS;

	// Enable the PIE Vector Table
	PieCtrlRegs.PIECRTL.bit.ENPIE = 1;	
			
}

//---------------------------------------------------------------------------
//InitEV:
//---------------------------------------------------------------------------
//This function initializes the Evernt manager register

void sInitEV(void)
{
    //disable PDPINTA & PDPINTB
    EvaRegs.EVAIMRA.bit.PDPINTA=0;
    EvaRegs.EVAIFRA.bit.PDPINTA=1;
    
    EvbRegs.EVBIMRA.bit.PDPINTB=0;
    EvbRegs.EVBIFRA.bit.PDPINTB=1;

    //Disable compare Trip,diable compare output,compare out put force low
    //Enable T1,T2 PWM output for six independence PWM
    EvaRegs.GPTCONA.all=0x0040;	

    // Initialize EVA Timer 1:
    // Setup Timer 1 Registers (EV A)
    // Continuous Up/Down Mode, Reload when counter is 0,Disable timer
    // Disalbe timer compare operation,150MHz
    //EvaRegs.T1CON.all=0x0800;	
    // Enable compare output for six independence PWM
    EvaRegs.T1CON.all=0x0802;	

    //Enable full compare, load when T1CNT=0 or T1CNT=T1PR,
    //Active control register reload when T1CNT=0 or T1CNT=T1PR.
    //EvaRegs.COMCONA.all=0xA600;
    EvaRegs.COMCONA.all=0xAA00;
    // 1.5us dead time, 150MHz/16, Dead-band timer period=14
    //EvaRegs.DBTCONA.all=0x0EF0;
    EvaRegs.DBTCONA.all=0x0CF0;			//1.28us dead time	
    // disable PWM 1-6 
    EvaRegs.ACTRA.all=0;// three pairs PWM must be set together
	
//	EvaRegs.ACTRA.bit.CMP2ACT=2;
//	EvaRegs.ACTRA.bit.CMP1ACT=1;
//	
//	EvaRegs.ACTRA.bit.CMP4ACT=2;
//	EvaRegs.ACTRA.bit.CMP3ACT=1;
//	
//	
//	EvaRegs.ACTRA.bit.CMP6ACT=1;
//	EvaRegs.ACTRA.bit.CMP5ACT=2;
	
    EvaRegs.T1CNT=0;
    EvaRegs.T1PR=0x0F42;
    EvaRegs.T1CMPR=0;
    //enable compare for six independent PWM
    //EvaRegs.T1CMPR=0x0200;	
    // PWM 1-6 test
    //EvaRegs.CMPR1=0x05DC;
    //EvaRegs.CMPR2=0x05DC;
    //EvaRegs.CMPR3=0x05DC;
    //Enable T1 Period interrupt and T1 Underflow interrupt
    EvaRegs.EVAIMRA.bit.T1PINT=1;
    EvaRegs.EVAIFRA.bit.T1PINT=1;
    EvaRegs.EVAIMRA.bit.T1UFINT=1;
    EvaRegs.EVAIFRA.bit.T1UFINT=1;
    
    //Use timer2's compare interrupt to generate 1ms TimerTick
    //contunuous Up Mode, Reload when counter is 0,Diable timer