📄 main.asm
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.global _sInitAdc
DW$40 .dwtag DW_TAG_subprogram, DW_AT_name("sInitAdc"), DW_AT_symbol_name("_sInitAdc")
.dwattr DW$40, DW_AT_low_pc(_sInitAdc)
.dwattr DW$40, DW_AT_high_pc(0x00)
.dwattr DW$40, DW_AT_begin_file("main.c")
.dwattr DW$40, DW_AT_begin_line(0x1bd)
.dwattr DW$40, DW_AT_begin_column(0x06)
.dwpsn "main.c",446,1
.dwfde DW$CIE
;----------------------------------------------------------------------
; 445 | void sInitAdc(void)
;----------------------------------------------------------------------
;***************************************************************
;* FNAME: _sInitAdc FR SIZE: 0 *
;* *
;* FUNCTION ENVIRONMENT *
;* *
;* FUNCTION PROPERTIES *
;* 0 Parameter, 0 Auto, 0 SOE *
;***************************************************************
_sInitAdc:
;----------------------------------------------------------------------
; 447 | extern void DSP28x_usDelay(unsigned long Count);
; 449 | // To powerup the ADC the ADCENCLK bit should be set first to enable
; 450 | // clocks, followed by powering up the bandgap and reference circuitry.
; 451 | // After a 5ms delay the rest of the ADC can be powered up. After ADC
; 452 | // powerup, another 20us delay is required before performing the first
; 453 | // ADC conversion. Please note that for the delay function below to
; 454 | // operate correctly the CPU_CLOCK_SPEED define statement in the
; 455 | // DSP28_Device.h file must contain the correct CPU clock period in
; 456 | // nanoseconds. For example:
; 457 | //
; 458 | // #define CPU_CLOCK_SPEED 6.6667L // for a 150MHz CPU clock speed
; 460 | //This was done in the InitSysCtrl() function in DSP28_SysCtrl.c
; 461 | //asm(" EALLOW");
; 462 | //SysCtrlRegs.PCLKCR.bit.ADCENCLK = 1; // Power up clocks to ADC
; 463 | //SysCtrlRegs.WDCR = 0x6F; // Disable WD
; 464 | //asm(" EDIS");
;----------------------------------------------------------------------
.dwcfa 0x1d, -2
.dwcfa 0x1c, 26, 0
.dwcfa 0x09, 40, 26
.dwpsn "main.c",466,2
;----------------------------------------------------------------------
; 466 | AdcRegs.ADCTRL1.bit.RESET = 1; // Reset the ADC module
;----------------------------------------------------------------------
MOVW DP,#_AdcRegs
OR @_AdcRegs,#0x4000 ; |466|
.dwpsn "main.c",467,2
;----------------------------------------------------------------------
; 467 | asm(" RPT #20 || NOP"); // Must wait 12-cycles
; | (worst-case) for ADC reset to take effect // for test ywt/061214A
;----------------------------------------------------------------------
RPT #20 || NOP
.dwpsn "main.c",469,2
;----------------------------------------------------------------------
; 469 | AdcRegs.ADCTRL3.all = 0x00C6; // first power-up ref and bandg
; | ap circuits
; 471 | //AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3;// Power up bandgap/reference cir
; | cuitry
;----------------------------------------------------------------------
MOV @_AdcRegs+24,#198 ; |469|
.dwpsn "main.c",472,2
;----------------------------------------------------------------------
; 472 | DelayUs(10000); //According to spru060b(200407)
; | .pdf which the latest user guild , wait 7ms before setting ADCPWDN//lg/
; | 040803 // for test ywt/061214A
;----------------------------------------------------------------------
SPM #0
MOV AL,#10000 ; |472|
LCR #_DelayUs ; |472|
; call occurs [#_DelayUs] ; |472|
.dwpsn "main.c",473,2
;----------------------------------------------------------------------
; 473 | AdcRegs.ADCTRL3.bit.ADCPWDN = 1; // Set ADCPWDN=1 to power main
; | ADC
;----------------------------------------------------------------------
MOVW DP,#_AdcRegs+24
OR @_AdcRegs+24,#0x0020 ; |473|
.dwpsn "main.c",474,2
;----------------------------------------------------------------------
; 474 | DelayUs(200); // Wait 20us before using the A
; | DC
;----------------------------------------------------------------------
MOVB AL,#200 ; |474|
LCR #_DelayUs ; |474|
; call occurs [#_DelayUs] ; |474|
.dwpsn "main.c",483,5
;----------------------------------------------------------------------
; 483 | AdcRegs.ADCMAXCONV.all=0x000F;
;----------------------------------------------------------------------
MOVW DP,#_AdcRegs+2
MOV @_AdcRegs+2,#15 ; |483|
.dwpsn "main.c",484,5
;----------------------------------------------------------------------
; 484 | AdcRegs.ADCCHSELSEQ1.all=0x3210;
;----------------------------------------------------------------------
MOV @_AdcRegs+3,#12816 ; |484|
.dwpsn "main.c",485,5
;----------------------------------------------------------------------
; 485 | AdcRegs.ADCCHSELSEQ2.all=0x7654;
;----------------------------------------------------------------------
MOV @_AdcRegs+4,#30292 ; |485|
.dwpsn "main.c",486,5
;----------------------------------------------------------------------
; 486 | AdcRegs.ADCCHSELSEQ3.all=0xBA98;
;----------------------------------------------------------------------
MOV @_AdcRegs+5,#47768 ; |486|
.dwpsn "main.c",487,5
;----------------------------------------------------------------------
; 487 | AdcRegs.ADCCHSELSEQ4.all=0xFEDC;
; 489 | //Initial ADC: reset ADC, Set Acquisition window size = 0,so the width
; | of SOC
; 490 | //pulse is 1, Fclk is selected as CLK/1, Start-stop mode,Cascaded mode
; 491 | //AdcRegs.ADCTRL1.bit.RESET=1;
; 492 | //AdcRegs.ADCTRL1.all = 0x2710;
;----------------------------------------------------------------------
MOV @_AdcRegs+6,#65244 ; |487|
.dwpsn "main.c",493,5
;----------------------------------------------------------------------
; 493 | AdcRegs.ADCTRL1.all=0x2010; //0x4010;
; 494 | // diable EVB trigger ADC, Reset Seq1,Reset Seq2, Disable ADC Interrupt
; 495 | //AdcRegs.ADCTRL2.all=0x4040;
; 496 | //AdcRegs.ADCTRL2.all = 0x0900;
; 497 | //AdcRegs.ADCTRL2.bit.RST_SEQ1=1;
; 498 | //AdcRegs.ADCTRL2.all=0x4000;
;----------------------------------------------------------------------
MOV @_AdcRegs,#8208 ; |493|
.dwpsn "main.c",499,1
LRETR
; return occurs
.dwattr DW$40, DW_AT_end_file("main.c")
.dwattr DW$40, DW_AT_end_line(0x1f3)
.dwattr DW$40, DW_AT_end_column(0x01)
.dwendentry
.dwendtag DW$40
.sect ".text"
.global _sInitGpio
DW$41 .dwtag DW_TAG_subprogram, DW_AT_name("sInitGpio"), DW_AT_symbol_name("_sInitGpio")
.dwattr DW$41, DW_AT_low_pc(_sInitGpio)
.dwattr DW$41, DW_AT_high_pc(0x00)
.dwattr DW$41, DW_AT_begin_file("main.c")
.dwattr DW$41, DW_AT_begin_line(0x1fa)
.dwattr DW$41, DW_AT_begin_column(0x06)
.dwpsn "main.c",507,1
.dwfde DW$CIE
;----------------------------------------------------------------------
; 506 | void sInitGpio(void)
;----------------------------------------------------------------------
;***************************************************************
;* FNAME: _sInitGpio FR SIZE: 0 *
;* *
;* FUNCTION ENVIRONMENT *
;* *
;* FUNCTION PROPERTIES *
;* 0 Parameter, 0 Auto, 0 SOE *
;***************************************************************
_sInitGpio:
;----------------------------------------------------------------------
; 509 | // Set GPIO A port pins,AL(Bits 7:0)(input)-AH(Bits 15:8) (output) 8bit
; | s
; 510 | // Input Qualifier =0, none
;----------------------------------------------------------------------
.dwcfa 0x1d, -2
.dwcfa 0x1c, 26, 0
.dwcfa 0x09, 40, 26
.dwpsn "main.c",511,5
;----------------------------------------------------------------------
; 511 | EALLOW;
;----------------------------------------------------------------------
EALLOW
.dwpsn "main.c",512,5
;----------------------------------------------------------------------
; 512 | GpioMuxRegs.GPAMUX.all=0x07FF;
;----------------------------------------------------------------------
MOVW DP,#_GpioMuxRegs
MOV @_GpioMuxRegs,#2047 ; |512|
.dwpsn "main.c",513,5
;----------------------------------------------------------------------
; 513 | GpioMuxRegs.GPADIR.all=0xE000;
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+1,#57344 ; |513|
.dwpsn "main.c",514,5
;----------------------------------------------------------------------
; 514 | GpioMuxRegs.GPAQUAL.all=0x00FF; // sync clock/510
;----------------------------------------------------------------------
MOVB AL,#255 ; |514|
MOV @_GpioMuxRegs+2,AL ; |514|
.dwpsn "main.c",516,5
;----------------------------------------------------------------------
; 516 | GpioMuxRegs.GPBMUX.all=0x077F; // ywt/061208C
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+4,#1919 ; |516|
.dwpsn "main.c",517,5
;----------------------------------------------------------------------
; 517 | GpioMuxRegs.GPBDIR.all=0xE080;
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+5,#57472 ; |517|
.dwpsn "main.c",518,5
;----------------------------------------------------------------------
; 518 | GpioMuxRegs.GPBQUAL.all=0x00FF; // Input qualifier disabled
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+6,AL ; |518|
.dwpsn "main.c",520,5
;----------------------------------------------------------------------
; 520 | GpioMuxRegs.GPDMUX.all=0x0000; //0x0021; lg/040203
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+12,#0 ; |520|
.dwpsn "main.c",521,5
;----------------------------------------------------------------------
; 521 | GpioMuxRegs.GPDDIR.all=0x0063; //0x0042; lg/040203
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+13,#99 ; |521|
.dwpsn "main.c",522,5
;----------------------------------------------------------------------
; 522 | GpioMuxRegs.GPDQUAL.all=0x0000;
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+14,#0 ; |522|
.dwpsn "main.c",524,5
;----------------------------------------------------------------------
; 524 | GpioMuxRegs.GPEMUX.all=0x0001;
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+16,#1 ; |524|
.dwpsn "main.c",525,5
;----------------------------------------------------------------------
; 525 | GpioMuxRegs.GPEDIR.all=0x0000;
;----------------------------------------------------------------------
MOV @_GpioMuxRegs+17,#0 ; |525|
.dwpsn "main.c",526,5
;----------------------------------------------------------------------
; 526 | GpioMuxRegs.GPEQUAL.all=0x0000;
; 528 | // GpioMuxRegs.GPFMUX.all=0x00FF;
; 529 | // GpioMuxRegs.GPFDI⌨️ 快捷键说明
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