📄 registers.h
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struct CANMSGCTRL_BITS bit;
};
/* eCAN Message Data Register low (MDR_L) word definitions */
struct CANMDL_WORDS { // bits description
unsigned int LOW_WORD:16; // 0:15
unsigned int HI_WORD:16; // 31:16
};
/* eCAN Message Data Register low (MDR_L) byte definitions */
struct CANMDL_BYTES { // bits description
unsigned int BYTE1:8; // 0:7
unsigned int BYTE2:8; // 8:15
unsigned int BYTE3:8; // 16:23
unsigned int BYTE4:8; // 24:31
};
/* Allow access to the bit fields or entire register */
union CANMDL_REG {
unsigned long all;
struct CANMDL_WORDS word;
struct CANMDL_BYTES byte;
};
/* eCAN Message Data Register high (MDR_H) word definitions */
struct CANMDH_WORDS { // bits description
unsigned int LOW_WORD:16; // 0:15
unsigned int HI_WORD:16; // 31:16
};
/* eCAN Message Data Register low (MDR_H) byte definitions */
struct CANMDH_BYTES { // bits description
unsigned int BYTE5:8; // 0:7
unsigned int BYTE6:8; // 8:15
unsigned int BYTE7:8; // 16:23
unsigned int BYTE8:8; // 24:31
};
/* Allow access to the bit fields or entire register */
union CANMDH_REG {
unsigned long all;
struct CANMDH_WORDS word;
struct CANMDH_BYTES byte;
};
struct MBOX {
union CANMSGID_REG MSGID;
union CANMSGCTRL_REG MSGCTRL;
union CANMDL_REG MDL;
union CANMDH_REG MDH;
};
/**************************************/
/* eCAN Mailboxes */
/**************************************/
struct ECAN_MBOXES {
struct MBOX MBOX0;
struct MBOX MBOX1;
struct MBOX MBOX2;
struct MBOX MBOX3;
struct MBOX MBOX4;
struct MBOX MBOX5;
struct MBOX MBOX6;
struct MBOX MBOX7;
struct MBOX MBOX8;
struct MBOX MBOX9;
struct MBOX MBOX10;
struct MBOX MBOX11;
struct MBOX MBOX12;
struct MBOX MBOX13;
struct MBOX MBOX14;
struct MBOX MBOX15;
struct MBOX MBOX16;
struct MBOX MBOX17;
struct MBOX MBOX18;
struct MBOX MBOX19;
struct MBOX MBOX20;
struct MBOX MBOX21;
struct MBOX MBOX22;
struct MBOX MBOX23;
struct MBOX MBOX24;
struct MBOX MBOX25;
struct MBOX MBOX26;
struct MBOX MBOX27;
struct MBOX MBOX28;
struct MBOX MBOX29;
struct MBOX MBOX30;
struct MBOX MBOX31;
};
/* eCAN Local Acceptance Mask (LAM) bit definitions */
struct CANLAM_BITS { // bits description
unsigned int LAM_L:16; // 0:15
unsigned int LAM_H:13; // 16:28
unsigned int rsvd1:2; // 29:30 reserved
unsigned int LAMI:1; // 31
};
/* Allow access to the bit fields or entire register */
union CANLAM_REG {
unsigned long all;
struct CANLAM_BITS bit;
};
/**************************************/
/* eCAN Local Acceptance Masks */
/**************************************/
/* eCAN LAM File */
struct LAM_REGS {
union CANLAM_REG LAM0;
union CANLAM_REG LAM1;
union CANLAM_REG LAM2;
union CANLAM_REG LAM3;
union CANLAM_REG LAM4;
union CANLAM_REG LAM5;
union CANLAM_REG LAM6;
union CANLAM_REG LAM7;
union CANLAM_REG LAM8;
union CANLAM_REG LAM9;
union CANLAM_REG LAM10;
union CANLAM_REG LAM11;
union CANLAM_REG LAM12;
union CANLAM_REG LAM13;
union CANLAM_REG LAM14;
union CANLAM_REG LAM15;
union CANLAM_REG LAM16;
union CANLAM_REG LAM17;
union CANLAM_REG LAM18;
union CANLAM_REG LAM19;
union CANLAM_REG LAM20;
union CANLAM_REG LAM21;
union CANLAM_REG LAM22;
union CANLAM_REG LAM23;
union CANLAM_REG LAM24;
union CANLAM_REG LAM25;
union CANLAM_REG LAM26;
union CANLAM_REG LAM27;
union CANLAM_REG LAM28;
union CANLAM_REG LAM29;
union CANLAM_REG LAM30;
union CANLAM_REG LAM31;
};
/* Mailbox MOTS File */
struct MOTS_REGS {
unsigned long MOTS0;
unsigned long MOTS1;
unsigned long MOTS2;
unsigned long MOTS3;
unsigned long MOTS4;
unsigned long MOTS5;
unsigned long MOTS6;
unsigned long MOTS7;
unsigned long MOTS8;
unsigned long MOTS9;
unsigned long MOTS10;
unsigned long MOTS11;
unsigned long MOTS12;
unsigned long MOTS13;
unsigned long MOTS14;
unsigned long MOTS15;
unsigned long MOTS16;
unsigned long MOTS17;
unsigned long MOTS18;
unsigned long MOTS19;
unsigned long MOTS20;
unsigned long MOTS21;
unsigned long MOTS22;
unsigned long MOTS23;
unsigned long MOTS24;
unsigned long MOTS25;
unsigned long MOTS26;
unsigned long MOTS27;
unsigned long MOTS28;
unsigned long MOTS29;
unsigned long MOTS30;
unsigned long MOTS31;
};
/* Mailbox MOTO File */
struct MOTO_REGS {
unsigned long MOTO0;
unsigned long MOTO1;
unsigned long MOTO2;
unsigned long MOTO3;
unsigned long MOTO4;
unsigned long MOTO5;
unsigned long MOTO6;
unsigned long MOTO7;
unsigned long MOTO8;
unsigned long MOTO9;
unsigned long MOTO10;
unsigned long MOTO11;
unsigned long MOTO12;
unsigned long MOTO13;
unsigned long MOTO14;
unsigned long MOTO15;
unsigned long MOTO16;
unsigned long MOTO17;
unsigned long MOTO18;
unsigned long MOTO19;
unsigned long MOTO20;
unsigned long MOTO21;
unsigned long MOTO22;
unsigned long MOTO23;
unsigned long MOTO24;
unsigned long MOTO25;
unsigned long MOTO26;
unsigned long MOTO27;
unsigned long MOTO28;
unsigned long MOTO29;
unsigned long MOTO30;
unsigned long MOTO31;
};
/* --------------------------------------------------- */
/* F2810/12 Event Manager (EV) GP Timer Registers */
/* */
/* ----------------------------------------------------*/
/*
INDEX: EV_Registers ()
*/
/* Overall Timer Control Register */
struct GPTCONA_BITS {
unsigned int T1PIN:2; // 1:0 Polarity of GP timer 1 compare
unsigned int T2PIN:2; // 3:2 Polarity of GP timer 2 compare
unsigned int T1CMPOE:1; // 4 Timer1 compare output
unsigned int T2CMPOE:1; // 5 Timer2 compare output
unsigned int TCOMPOE:1; // 6 Compare output enable
unsigned int T1TOADC:2; // 8:7 Start ADC with timer 1 event
unsigned int T2TOADC:2; // 10:9 Start ADC with timer 2 event
unsigned int rsvd2:2; // 12:11 reserved
unsigned int T1STAT:1; // 13 GP Timer 1 status (read only)
unsigned int T2STAT:1; // 14 GP Timer 2 status (read only)
unsigned int rsvd:1; // 15 reserved
};
/* Allow access to the bit fields or entire register */
union GPTCONA_REG {
unsigned int all;
struct GPTCONA_BITS bit;
};
struct GPTCONB_BITS {
unsigned int T3PIN:2; // 1:0 Polarity of GP timer 3 compare
unsigned int T4PIN:2; // 3:2 Polarity of GP timer 4 compare
unsigned int T3CMPOE:1; // 4 Timer3 compare output
unsigned int T4CMPOE:1; // 5 Timer4 compare output
unsigned int TCOMPOE:1; // 6 Compare output enable
unsigned int T3TOADC:2; // 8:7 Start ADC with timer 3 event
unsigned int T4TOADC:2; // 10:9 Start ADC with timer 4 event
unsigned int T1CTRIP:1; // 11 Timer1 trip enable
unsigned int T2CTRIP:1; // 12 Timer2 trip enable
unsigned int T3STAT:1; // 13 GP Timer 3 status (read only)
unsigned int T4STAT:1; // 14 GP Timer 4 status (read only)
unsigned int rsvd2:1; // 15 reserved
};
/* Allow access to the bit fields or entire register */
union GPTCONB_REG {
unsigned int all;
struct GPTCONB_BITS bit;
};
/* Timer Control Register bit defintions */
struct TCONA_BITS {
unsigned int SET1PR:1; // 0 Period register select
unsigned int TECMPR:1; // 1 Timer compare enable
unsigned int TCLD10:2; // 3:2 Timer copare register reload
unsigned int TCLKS10:2; // 5:4 Clock source select
unsigned int TENABLE:1; // 6 Timer enable
unsigned int T2SWT1:1; // 7 Start GP timer 2 with GP timer 1's enable
unsigned int TPS:3; // 10:8 Input clock prescaler
unsigned int TMODE:2; // 12:11 Count mode selection
unsigned int rsvd:1; // 13 reserved
unsigned int FREE:1; // 14 Free emulation control
unsigned int SOFT:1; // 15 Soft emulation control
};
/* Allow access to the bit fields or entire register */
union TCONA_REG {
unsigned int all;
struct TCONA_BITS bit;
};
struct TCONB_BITS {
unsigned int SET3PR:1; // 0 Period register select
unsigned int TECMPR:1; // 1 Timer compare enable
unsigned int TCLD10:2; // 3:2 Timer copare register reload
unsigned int TCLKS10:2; // 5:4 Clock source select
unsigned int TENABLE:1; // 6 Timer enable
unsigned int T4SWT3:1; // 7 Start GP timer 2 with GP timer 1's enable
unsigned int TPS:3; // 10:8 Input clock prescaler
unsigned int TMODE:2; // 12:11 Count mode selection
unsigned int rsvd:1; // 13 reserved
unsigned int FREE:1; // 14 Free emulation control
unsigned int SOFT:1; // 15 Soft emulation control
};
/* Allow access to the bit fields or entire register */
union TCONB_REG {
unsigned int all;
struct TCONB_BITS bit;
};
struct EXTCONA_BITS {
unsigned int INDCOE:1; // 0 Independant compare output
unsigned int QEPIQEL:1; // 1 QEP/CAP3 Index Qual Mode
unsigned int QEPIE:1; // 2 QEP index enable
unsigned int EVSOCE:1; // 3 Ev star⌨️ 快捷键说明
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