sysctrl.c

基于TMS320F2812 的精密温度控制程序代码

/*********************************************************************
* File: SysCtrl.c                                                    *
* Description: Contains system register initialization functions     *
*   used in the TEC application.                                     *
* DSP: TMS320F2812                                                   *
* Author: David M. Alter                                             *
* Function List: InitSysCtrl()                                       *
* History:                                                           *
*   11/05/02 - Original, based on DSP28 header files v0.58 (D. Alter)*
* Notes: none                                                        *
*********************************************************************/

/*********************************************************************
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#include "Device.h"

/*********************************************************************
* Function: InitSysCtrl()                                            *
* Description: Initializes the F2812 CPU.                            *
* DSP: TMS320F2812                                                   *
* Author: David M. Alter                                             *
* Include files: none                                                *
* Function Prototype: void InitSysCtrl(void)                         *
* Useage: InitSysCtrl();                                             *
* Input Parameters: none                                             *
* Return Value: none                                                 *
* Notes: none                                                        *
*********************************************************************/
void InitSysCtrl(void)
{
/*** Local variables ***/
volatile Uint16 dummy;					// General purpose volatile Uint16

/*** Enable EALLOW protected register access ***/
	asm(" EALLOW");

/*** Memory Protection Configuration ***/
	DevEmuRegs.PROTSTART = 0x0100;		// Write default value to protection start register
	DevEmuRegs.PROTRANGE = 0x00FF;		// Write default value to protection range register

/*** Configure the DFT bits to set M0/M1/L0/L1/H0 RAM block timings
     Note: Configuring these bits is only required in F2812/10 silicon revisions
     A and B (Chip package markings CA and CB).  The default for these bits is
     being changed for revision C and later silicon so they match the below.  ***/
	DevEmuRegs.M0RAMDFT = 0x0300;		// Always set as 0x0300
	DevEmuRegs.M1RAMDFT = 0x0300;		// Always set as 0x0300
	DevEmuRegs.L0RAMDFT = 0x0300;		// Always set as 0x0300
	DevEmuRegs.L1RAMDFT = 0x0300;		// Always set as 0x0300
	DevEmuRegs.H0RAMDFT = 0x0300;		// Always set as 0x0300

/*** Unlock the Code Security Module ***/
	dummy = CsmPwl.PSWD0;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD1;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD2;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD3;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD4;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD5;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD6;				// Dummy read of PWL locations
	dummy = CsmPwl.PSWD7;				// Dummy read of PWL locations
	CsmPwl.PSWD0 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD1 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD2 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD3 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD4 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD5 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD6 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)
	CsmPwl.PSWD7 = 0xFFFF;				// Write the passwords (not necessary if 0xFFFF)

/*** Disable the Watchdog Timer ***/
	SysCtrlRegs.WDCR = 0x00E8;
/*
 bit 15-8      0's:    reserved
 bit 7         1:      WDFLAG, write 1 to clear
 bit 6         1:      WDDIS, 1=disable WD
 bit 5-3       101:    WDCHK, WD check bits, always write as 101b
 bit 2-0       000:    WDPS, WD prescale bits, 000: WDCLK=OSCCLK/512/1
*/

/* System and Control Register */
	SysCtrlRegs.SCSR.all = 0x0000;
/*
 bit 15-3      0's:    reserved
 bit 2         0:      WDINTS, WD interrupt status bit (read-only)
 bit 1         0:      WDENINT, 0=WD causes reset, 1=WD causes WDINT
 bit 0         0:      WDOVERRIDE, write 1 to disable disabling of the WD (clear-only)
*/

/*** Configure the PLL and clocks ***/
	SysCtrlRegs.PLLCR = 0x000A;			// PLL control, 0xA: PLLx5

	SysCtrlRegs.HISPCP.all = 0x0000;	// Hi-speed periph clock prescaler, 0: HSPCLK=SYSCLKOUT/1
	SysCtrlRegs.LOSPCP.all = 0x0002;	// Lo-speed periph clock prescaler, 2: LOSPCLK=SYSCLKOUT/4

	SysCtrlRegs.PCLKCR.bit.ECANENCLK = 1;	// SYSCLK to CAN enabled
	SysCtrlRegs.PCLKCR.bit.MCBSPENCLK = 1;	// LSPCLK to McBSP enabled
	SysCtrlRegs.PCLKCR.bit.SCIENCLKB = 1;	// LSPCLK to SCIB enabled
	SysCtrlRegs.PCLKCR.bit.SCIENCLKA = 1;	// LSPCLK to SCIA enabled
	SysCtrlRegs.PCLKCR.bit.SPIENCLK = 1;	// LSPCLK to SPI enabled
	SysCtrlRegs.PCLKCR.bit.ADCENCLK = 1;	// HSPCLK to ADC enabled
	SysCtrlRegs.PCLKCR.bit.EVBENCLK = 1;	// HSPCLK to EVB enabled
	SysCtrlRegs.PCLKCR.bit.EVAENCLK = 1;	// HSPCLK to EVA enabled

/*** Configure the low-power modes ***/
	SysCtrlRegs.LPMCR0 = 0x00FC;		// LPMCR0 set to default value
	SysCtrlRegs.LPMCR1 = 0x0000;		// LPMCR1 set to default value

/*** Disable EALLOW protected register access ***/
	asm(" EDIS");

} //end InitSysCtrl()


/*** end of file *****************************************************/