m68328.h

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/******************************************************************************

 (c) Copyright Motorola Semiconductors Hong Kong Limited 1995-2000
 ALL RIGHTS RESERVED

******************************************************************************
 Project Name  : Personal Portable System Manager, PPSM
 Project No.   : PDAPSM031
 Title         : M68328 ADS hardware location header file
 File Name     : M68328.H
 Created On    : 03/28/95
 Modifications : 09/30/99 IL - Fixed error log 111 (EL-111)
                 01/07/00 KI - Changed the baud rate value retrieval from lookup
                               table back to calculation (CE-004)
                 01/19/00 EC - Changed the register base address to full 32 bit
                 			   (CE-009)
                 01/19/00 EC - Changed the naming of UART register from
                 			   M328_NIPR to M328_UNIPR (CE-013)
				 01/19/00 EC - Added new port register (VZ-002)
				 02/02/00 EC - What used to be EZ only is now common
 				 			   to VZ also (VZ-008)
 				 02/07/00 EC - Added logic to support configurable
 				 			   interrupt (VZ-011)
 				 02/07/00 EC - Added logic to support new modules (VZ-013)
 Release       : 02/29/00 PPSM v3.20

 Description   :

	Address locations assigned for the M68328 ADS hardware platform.

*****************************************************************************/
#ifndef M68328_INCLUDED
#define M68328_INCLUDED

#define M328BASE        0xFFFFF000	/*** CE-009 ***/

/* SIM28 System Configuration Registers */
#define M328_SCR        (M328BASE+0x000)

/* Chip Select Registers */

#if defined(EZ328) || defined(VZ328)    /*** VZ-008 ***/
/* CS Group Mask Registers have been deleted for EZ */
					
#define M328_CSA0       (M328BASE+0x110)    /* Group A CS Registers */
#define M328_CSB0       (M328BASE+0x112)    /* Group B CS Registers */
#define M328_CSC0       (M328BASE+0x114)    /* Group C CS Registers */
#define M328_CSD0       (M328BASE+0x116)    /* Group D CS Registers */

/* New support on Emulation Chip Select Register for EZ */
#define M328_EMUCS      (M328BASE+0x118)

/* PLL Registers */
#define M328_PLLCR      (M328BASE+0x200)        /* Control Reg */
#define M328_PLLFSR     (M328BASE+0x202)        /* Freq Select Reg */
#define M328_PLLTSR     (M328BASE+0x204)        /* Test Reg */

/* Power Control Registers */
#define M328_PCTLR      (M328BASE+0x206)        /* Control Reg */

/* Interrupt Registers */
#define M328_IVR        (M328BASE+0x300)        /* Interrupt Vector Reg */
#define M328_ICR        (M328BASE+0x302)        /* Interrupt Control Reg */
#define M328_IMR        (M328BASE+0x304)        /* Interrupt Mask Reg */
#define M328_ISR        (M328BASE+0x30C)        /* Interrupt Status Reg */
#define M328_IPR        (M328BASE+0x310)        /* Interrupt Pending Reg */
#if defined(VZ328)  /*** ADD VZ-011 ***/
#define M328_ILCR       (M328BASE+0x314)	/* Interrupt Level Reg */
#endif

/* PIO Registers */
					/* Port A Registers */
#define M328_PADIR      (M328BASE+0x400)        /* Direction Reg */
#define M328_PADATA     (M328BASE+0x401)        /* Data Reg */
#define M328_PAPUEN     (M328BASE+0x402)        /* New Pullup Enable Reg */
					/* Port B Registers */
#define M328_PBDIR      (M328BASE+0x408)        /* Direction Reg */
#define M328_PBDATA     (M328BASE+0x409)        /* Data Reg */
#define M328_PBPUEN     (M328BASE+0x40A)        /* New Pullup Enable Reg */
#define M328_PBSEL      (M328BASE+0x40b)        /* Select Reg */
					/* Port C Registers */
#define M328_PCDIR      (M328BASE+0x410)        /* Direction Reg */
#define M328_PCDATA     (M328BASE+0x411)        /* Data Reg */
#define M328_PCPDEN     (M328BASE+0x412)        /* New Pulldown Enable Reg */
#define M328_PCSEL      (M328BASE+0x413)        /* Select Reg */
					/* Port D Registers */
#define M328_PDDIR      (M328BASE+0x418)        /* Direction Reg */
#define M328_PDDATA     (M328BASE+0x419)        /* Data Reg */
#define M328_PDPUEN     (M328BASE+0x41A)        /* Pullup Enable Reg */
#define M328_PDSEL      (M328BASE+0x41B)        /* New Select Reg */
#define M328_PDPOL      (M328BASE+0x41C)        /* Polarity Reg */
#define M328_PDIRQEN    (M328BASE+0x41D)        /* IRQ Enable Reg */
#define M328_PDIRQEDGE  (M328BASE+0x41F)        /* IRQ Edge Reg */
					/* Port E Registers */
#define M328_PEDIR      (M328BASE+0x420)        /* Direction Reg */
#define M328_PEDATA     (M328BASE+0x421)        /* Data Reg */
#define M328_PEPUEN     (M328BASE+0x422)        /* New Pullup Enable Reg */
#define M328_PESEL      (M328BASE+0x423)        /* Select Reg */
					/* Port F Registers */
#define M328_PFDIR      (M328BASE+0x428)        /* Direction Reg */
#define M328_PFDATA     (M328BASE+0x429)        /* Data Reg */
#define M328_PFPUEN     (M328BASE+0x42A)        /* New Pullup Enable Reg */
#define M328_PFSEL      (M328BASE+0x42B)        /* Select Reg */

					/* Port G Registers */
#define M328_PGDIR      (M328BASE+0x430)       /* Direction Reg */
#define M328_PGDATA     (M328BASE+0x431)       /* Data Reg */
#define M328_PGPUEN     (M328BASE+0x432)       /* New Pullup Enable Reg */
#define M328_PGSEL      (M328BASE+0x433)       /* Select Reg */

/*** ADD VZ-002 ... ***/
#if defined(VZ328)
					/* Port J Registers */
#define M328_PJDIR      (M328BASE+0x438)       /* Direction Reg */
#define M328_PJDATA     (M328BASE+0x439)       /* Data Reg */
#define M328_PJPUEN     (M328BASE+0x43A)       /* New Pullup Enable Reg */
#define M328_PJSEL      (M328BASE+0x43B)       /* Select Reg */

					/* Port K Registers */
#define M328_PKDIR      (M328BASE+0x440)       /* Direction Reg */
#define M328_PKDATA     (M328BASE+0x441)       /* Data Reg */
#define M328_PKPUEN     (M328BASE+0x442)       /* New Pullup Enable Reg */
#define M328_PKSEL      (M328BASE+0x443)       /* Select Reg */

					/* Port M Registers */
#define M328_PMDIR      (M328BASE+0x448)       /* Direction Reg */
#define M328_PMDATA     (M328BASE+0x449)       /* Data Reg */
#define M328_PMPUEN     (M328BASE+0x44A)       /* New Pullup Enable Reg */
#define M328_PMSEL      (M328BASE+0x44B)       /* Select Reg */
#endif
/*** ... ADD VZ-002 ***/

/* PWM Registers */
#define M328_PWMC       (M328BASE+0x500)        /* Control Reg */
#define M328_PWMS       (M328BASE+0x502)        /* Sample Reg */
#define M328_PWMP       (M328BASE+0x504)        /* Period Reg */
#define M328_PWMCNT     (M328BASE+0x505)        /* Counter Reg */

/*** ADD VZ-013 ... ***/
#if defined(VZ328)
/* 
 * we create an alias set for PWM1 registers so that user can decide
 * which one to use or to overwrite our default on PWM1
 */
#define M328_PWMC1		M328_PWMC				/* Control Reg */
#define M328_PWMS1		M328_PWMS				/* Sample Reg */
#define M328_PWMP1		M328_PWMP				/* Period Reg */
#define M328_PWMCNT1	M328_PWMCNT				/* Counter Reg */

/* VZ PWM-2 Registers */
#define M328_PWMC2		(M328BASE+0x510)        /* Control Reg */
#define M328_PWMS2		(M328BASE+0x512)        /* Sample Reg */
#define M328_PWMP2		(M328BASE+0x514)        /* Period Reg */
#define M328_PWMCNT2	(M328BASE+0x515)        /* Counter Reg */
#endif
/*** ... ADD VZ-013 ***/

/* Timer Registers */
#define M328_TIMER1      (M328BASE+0x600)        /* Control Reg */
#define M328_TCTL1       (M328BASE+0x600)        /* Control Reg */
#define M328_TPRER1      (M328BASE+0x602)        /* Prescalar Reg */
#define M328_TCMP1       (M328BASE+0x604)        /* Compare Reg */
#define M328_TCR1        (M328BASE+0x606)        /* Capture Reg */
#define M328_TCN1        (M328BASE+0x608)        /* Counter */
#define M328_TSTAT1      (M328BASE+0x60A)        /* Status Reg */

/*** ADD VZ-013 ... ***/
#if defined(VZ328)
/* 
 * PPSM v3.x does not allow user to tamper with Timer-1 since it is used
 * by the system internally. Users can use Timer-2 in VZ but they cannot
 * cascade the two
 */
/* VZ Timer-2 Registers */
#define M328_TIMER2      (M328BASE+0x610)        /* Control Reg */
#define M328_TCTL2       (M328BASE+0x610)        /* Control Reg */
#define M328_TPRER2      (M328BASE+0x612)        /* Prescalar Reg */
#define M328_TCMP2       (M328BASE+0x614)        /* Compare Reg */
#define M328_TCR2        (M328BASE+0x616)        /* Capture Reg */
#define M328_TCN2        (M328BASE+0x618)        /* Counter */
#define M328_TSTAT2      (M328BASE+0x61A)        /* Status Reg */
#endif
/*** ... ADD VZ-013 ***/

/* Watchdog Registers */
#define M328_WDG        (M328BASE+0x618)        /* WatchDog */
#define M328_WCR        (M328BASE+0x618)        /* Control Reg */
#define M328_WRR        (M328BASE+0x61A)        /* Reference Reg */
#define M328_WCN        (M328BASE+0x61C)        /* Counter */

/*** ADD VZ-013 ... ***/
#if defined(VZ328)
/* SPI-1 Registers (master and slave capable) */
#define M328_SPIRXD1	(M328BASE+0x700)		/* Receive Data Reg */
#define M328_SPITXD1	(M328BASE+0x702)		/* Transmit Data Reg */
#define M328_SPICONT1	(M328BASE+0x704)		/* Control/Status Reg */
#define M328_SPIICS1	(M328BASE+0x706)		/* Interrupt Control/Status Reg */
#define M328_SPITEST1	(M328BASE+0x708)		/* Test Reg */
#define M328_SPISPCONT1	(M328BASE+0x70A)		/* Sample Period Control Reg */
#endif
/*** ... ADD VZ-013 ***/

/* SPI Registers */
/* SPI Slave Registers are deleted */
/* SPI Master Registers */
#define M328_SPIMDATA   (M328BASE+0x800)        /* Data Reg */
#define M328_SPIMCONT   (M328BASE+0x802)        /* Control/Status Reg */

/* UART Registers */
/*** ADD VZ-013 ... ***/
#if defined(VZ328)
/* 
 * PPSM v3.20 provides an option for the user to choose between the 2
 * UART's. To minimize code duplication, we use the following definitions
 * so that we can reuse existing UART code. This method (macro offset 
 * calculation) expands each C instruction to about 5 asm instructions.
 * Note that the variable "usUChoice" has to match with the local variable
 * in which function this macro is used.
 */
#define M328_USTCNT     (M328BASE+0x900+(usUChoice << 4))        /* Status/Control Reg */
#define M328_UBAUD      (M328BASE+0x902+(usUChoice << 4))        /* Baud Control Reg */
#define M328_UARTRX     (M328BASE+0x904+(usUChoice << 4))        /* Rx Reg */
#define M328_UARTTX     (M328BASE+0x906+(usUChoice << 4))        /* Tx Reg */
#define M328_UARTMISC   (M328BASE+0x908+(usUChoice << 4))        /* Misc Reg */
#define M328_UNIPR      (M328BASE+0x90A+(usUChoice << 4))        /* Non-integer prescalar Reg *//*** ADD CE-004 ***//*** MOD CE-013 ***/

/*
 * we provide these two sets of definitions so that user can write their
 * own UART drivers.
 */
#define M328_USTCNT1	(M328BASE+0x900)
#define M328_UBAUD1		(M328BASE+0x902)
#define M328_UARTRX1	(M328BASE+0x904)
#define M328_UARTTTX1	(M328BASE+0x906)
#define M328_UARTMISC1	(M328BASE+0x908)
#define M328_UNIPR1		(M328BASE+0x90A)

#define M328_USTCNT2	(M328BASE+0x910)
#define M328_UBAUD2		(M328BASE+0x912)
#define M328_UARTRX2	(M328BASE+0x914)
#define M328_UARTTTX2	(M328BASE+0x916)