nb_kernel230_ia64_double.s
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S
1,130 行
// ggid Index for Vc array // jjnr Pointer to next neighbor index // jnr Current jnr value // NJ0, NJ1 Bounds of current neighbor list // // Load up all the floating-point values (yes, McKinley can do 4 FP loads // per cycle) and initialize the loop counters and predicates. Compute // the initial position <x, y, z> and charge. If this isn't the last time // through the loop, start loading the next value for NJ1 - we already // moved the previous NJ1 -> NJ0.// OUTER PROLOGUE 1 { .mfi nop 0x0 mov FIX = f0 add Nouter = 1, Nouter } { .mmf ldfd shX = [shiftVPtr], 8 ldfd PosX = [posPtr], 8 mov FIY = f0 } ;;// OUTER PROLOGUE 2 { .mmf setf.sig f32 = NTI ldfd shY = [shiftVPtr], 8 nop 0x0 } { .mfi ldfd PosY = [posPtr], 8 nop 0x0 nop 0x0 } ;; { .mmf ldfd shZ = [shiftVPtr] ldfd PosZ = [posPtr] mov FIZ = f0 } { .mmi ldfd FShiftX = [FShiftIS], 8 ldfd FActIX = [FActII], 8 shladd VNBPtr = ggid, 3, VNB } ;;// OUTER PROLOGUE 4 { .mmf ldfd FShiftY = [FShiftIS], 8 ldfd FActIY = [FActII], 8 xma.l f32 = f32, f33, fZero } { .mii shladd VCPtr = ggid, 3, VC sub InnerCnt = NJ1, NJ0, 1 mov NJ0 = NJ1 } ;;// OUTER PROLOGUE 5 { .mmi ldfd FActIZ = [FActII], -16 ldfd FShiftZ = [FShiftIS], -16 nop 0x0 } ;;// OUTER PROLOGUE 6 { .mmf ldfd ICharge = [chargePtr] ldfd VNBTotal = [VNBPtr] fadd IX = shX, PosX } ;;// OUTER PROLOGUE 7 { .mfi ldfd VCTotal = [VCPtr] fadd IY = shY, PosY add NN0 = 1, NN0 } { .mfi (pCont) ld4 NJ1 = [jindexPtr], 4 nop 0x0 // This may seem strange, but we set the first stage of the // pipe to execute this way because setting pr.rot doesn't take // into account how much the predicates have rotated. If this is // the first time through, we cleared all the pipeline predicates // in the initialization. If not, flushing the pipeline set all // the pipeline predicates to 0 cmp.eq pPipe[0], p0 = zero, zero } ;;// OUTER PROLOGUE 8 { .mfi cmp.lt pCont, pDone = NN0, NN1 fadd IZ = shZ, PosZ mov ar.lc = InnerCnt } ;;// OUTER PROLOGUE 9 { .mfi getf.sig NTI = f32 fmpy IQ = ICharge, Facel mov ar.ec = PIPE_DEPTH } ;;// 14 bundles in outer loop - still aligned. // The inner loop is a 6-stage pipeline. The serial sequence of float ops // is folded into a 17-cycle loop (17 * 2 = 34 float ops, one empty), // then divided // into 5 stages.innerLoop:// INNER LOOP 1 { .mfi (pPipe[3]) ldfd FActX[0] = [FActPtr[3]], 8 (pPipe[2]) fnma RInvErr[1] = RInvErr[1], RInv[1], fOne (pPipe[0]) shladd jnr3 = jnr, 1, jnr } // We march through jjnr[] sequentially, so it's usually a good idea // to preload the next value. However, we don't want to do this if // (1) we're in the epilogue or (2) this is the last time through and // there are no more atoms to inspect. Thus, we keep track of the loop // trip and use the logic below to see if we should load ahead .pred.rel "mutex", pCont, pDone { .mfi (pCont) cmp.ge pJJNR, p0 = InnerCnt, zero (pPipe[5]) fma Disp_G[1] = eps1, Disp_H[1], Disp_G[1] (pDone) cmp.gt pJJNR, p0 = InnerCnt, zero } ;;// INNER LOOP 2 { .mfi (pPipe[3]) ldfd FActY[0] = [FActPtr[3]], 8 (pPipe[1]) fmpy RSqr[0] = DX[1], DX[1] (pPipe[4]) shladd nnn[1] = nnn[1], 2, zero } { .mfi (pPipe[0]) shladd posPtr = jnr3, 3, POSITION (pPipe[4]) fmpy RF_Fscal[1] = RF_Fscal[1], Charge[4] (pPipe[0]) shladd FActPtr[0] = jnr3, 3, FACTION } ;;// INNER LOOP 3 { .mfi (pPipe[0]) ldfd JX = [posPtr], 8 (pPipe[5]) fma Rep_G[1] = eps1, Rep_H[1], Rep_G[1] (pPipe[0]) shladd TypeJ[0] = jnr, 2, TYPE } { .mfi (pPipe[0]) shladd chargePtr = jnr, 3, CHARGE (pPipe[6]) fmpy Disp_F[2] = Disp_F[2], RInv[5] (pPipe[4]) shladd nnn[1] = nnn[1], 4, VFTab } ;;// INNER LOOP 4 { .mfi (pPipe[0]) ldfd JY = [posPtr], 8 nop 0x0 nop 0x0 } { .mfi nop 0x0 (pPipe[4]) fsub eps0 = RT[1], n0[1] (pPipe[0]) add InnerCnt = -1, InnerCnt } ;;// INNER LOOP 5 { .mfi (pPipe[0]) ldfd JZ = [posPtr], 8 (pPipe[2]) fmpy RInvU[0] = RInv[1], RInvErr[1] nop 0x0 } { .mfi (pJJNR) ld4 jnr = [jjnrPtr], 4 (pPipe[2]) fma RInvT[0] = RInvErr[1], f3_8, fHALF (pPipe[0]) add Ninner = 1, Ninner } ;;// INNER LOOP 6 { .mfi (pPipe[4]) ldfpd Disp_Y[0], Disp_F[0] = [nnn[1]], 16 (pPipe[1]) fma RSqr[0] = DY[1], DY[1], RSqr[0] nop 0x0 } { .mfi nop 0x0 (pPipe[5]) fma Disp_F[1] = eps1, Disp_G[1], Disp_F[1] nop 0x0 } ;;// INNER LOOP 7 { .mfi (pPipe[4]) ldfpd Disp_G[0], Disp_H[0] = [nnn[1]], 16 (pPipe[5]) fma Disp_G[1] = eps1, Disp_H[1], Disp_G[1] (pPipe[2]) shladd TypeJ[2] = TypeJ[2], 4, NBFP } { .mfi nop 0x0 (pPipe[5]) fma Rep_F[1] = eps1, Rep_G[1], Rep_F[1] (pJJNR) add jjnrPtr = JJNR_PREFETCH_DISTANCE, jjnrPtr } ;;// INNER LOOP 8 { .mfi (pPipe[4]) ldfpd Rep_Y[0], Rep_F[0] = [nnn[1]], 16 (pPipe[3]) fmpy RT[0] = RInv[2], RSqr[2] nop 0x0 } { .mfi nop 0x0 (pPipe[5]) fma Rep_G[1] = eps1, Rep_H[1], Rep_G[1] nop 0x0 } ;;// INNER LOOP 9 { .mfi (pPipe[4]) ldfpd Rep_G[0], Rep_H[0] = [nnn[1]] (pPipe[2]) fma RInv[1] = RInvU[0], RInvT[0], RInv[1] nop 0x0 } { .mfi (pPipe[0]) ld4 TypeJ[0] = [TypeJ[0]] (pPipe[6]) fma VNBTotal = C6[4], Disp_Y[2], VNBTotal nop 0x0 } ;;// INNER LOOP 10 { .mfi (pPipe[2]) ldfd C6[0] = [TypeJ[2]], 8 (pPipe[1]) fma RSqr[0] = DZ[1], DZ[1], RSqr[0] nop 0x0 } { .mfi (pJJNR) lfetch.nta [jjnrPtr] (pPipe[6]) fnma.s FActX[3] = Disp_F[2], DX[6], FActX[3] nop 0x0 } ;;// INNER LOOP 11 { .mfi (pPipe[3]) ldfd FActZ[0] = [FActPtr[3]], -16 (pPipe[5]) fma Disp_Y[1] = eps1, Disp_F[1], Disp_Y[1] nop 0x0 } { .mfi (pPipe[0]) ldfd Charge[0] = [chargePtr] (pPipe[5]) fma Disp_F[1] = eps1, Disp_G[1], Disp_F[1] nop 0x0 } ;;// INNER LOOP 12 { .mfi (pPipe[2]) ldfd C12[0] = [TypeJ[2]] (pPipe[3]) fcvt.fx.trunc n0[0] = RT[0] (pJJNR) add jjnrPtr = -JJNR_PREFETCH_DISTANCE, jjnrPtr } { .mfi nop 0x0 (pPipe[5]) fma Rep_Y[1] = eps1, Rep_F[1], Rep_Y[1] nop 0x0 } ;;// INNER LOOP 13 { .mfi (pPipe[2]) fmpy RInvErr[1] = RInv[1], RSqr[1] nop 0x0 } { .mfb nop 0x0 (pPipe[6]) fnma.s FActY[3] = Disp_F[2], DY[6], FActY[3] nop 0x0 } ;;// INNER LOOP 14 { .mfi nop 0x0 (pPipe[1]) frsqrta RInv[0], p0 = RSqr[0] (pPipe[1]) add TypeJ[1] = TypeJ[1], NTI } { .mfb nop 0x0 (pPipe[6]) fnma.s FActZ[3] = Disp_F[2], DZ[6], FActZ[3] nop 0x0 } ;;// INNER LOOP 15 { .mfi nop 0x0 (pPipe[5]) fmpy Disp_F[1] = C6[3], Disp_F[1] nop 0x0 } { .mfb nop 0x0 (pPipe[5]) fma Rep_F[1] = eps1, Rep_G[1], Rep_F[1] nop 0x0 } ;;// INNER LOOP 16 { .mfi nop 0x0 (pPipe[2]) fmpy RInvT[0] = RInv[1], fHALF nop 0x0 } { .mfi (pPipe[3]) getf.sig nnn[0] = n0[0] (pPipe[3]) fcvt.xf n0[0] = n0[0] nop 0x0 } ;;// INNER LOOP 17 { .mfi nop 0x0 (pPipe[2]) fnma RInvErr[1] = RInvErr[1], RInv[1], fOne nop 0x0 } { .mfi nop 0x0 (pPipe[6]) fma FIX = DX[6], Disp_F[2], FIX nop 0x0 } ;;// INNER LOOP 18 { .mfi nop 0x0 (pPipe[6]) fma FIY = DY[6], Disp_F[2], FIY nop 0x0 } { .mfi nop 0x0 (pPipe[1]) fmpy RInvErr[0] = RInv[0], RSqr[0] nop 0x0 } ;;// INNER LOOP 19 { .mfi (pPipe[6]) stfd [FActPtr[6]] = FActX[3], 8 (pPipe[0]) fsub DX[0] = IX, DX[0] nop 0x0 } { .mfi nop 0x0 (pPipe[5]) fma Disp_F[1] = C12[3], Rep_F[1], Disp_F[1] nop 0x0 } ;;// INNER LOOP 20 { .mfi (pPipe[6]) stfd [FActPtr[6]] = FActY[3], 8 (pPipe[0]) fsub DY[0] = IY, DY[0] nop 0x0 } { .mfi nop 0x0 (pPipe[6]) fma FIZ = DZ[6], Disp_F[2], FIZ nop 0x0 } ;;// INNER LOOP 21 { .mfi (pPipe[6]) stfd [FActPtr[6]] = FActZ[3], 8 (pPipe[0]) fsub DZ[0] = IZ, DZ[0] nop 0x0 } { .mfi nop 0x0 (pPipe[2]) fma RInv[1] = RInvErr[1], RInvT[0], RInv[1] nop 0x0 } ;;// INNER LOOP 22 { .mfi nop 0x0 (pPipe[3]) fnma RF_Fscal[0] = RF_Pot[1], fTWO, RInv[2] nop 0x0 } { .mfi nop 0x0 (pPipe[4]) fsub RF_Pot[2] = RF_Pot[2], Crf nop 0x0 } ;;// INNER LOOP 23 { .mfi nop 0x0 (pPipe[2]) fmpy RF_Pot[0] = Krf, RSqr[1] nop 0x0 } { .mfi nop 0x0 (pPipe[5]) fnma Disp_F[1] = Disp_F[1], Tabscale, RF_Fscal[2] nop 0x0 } ;;// INNER LOOP 24 { .mfi nop 0x0 (pPipe[1]) fmpy Charge[1] = Charge[1], IQ nop 0x0 } { .mfi nop 0x0 (pPipe[4]) fmpy RF_Fscal[1] = RF_Fscal[1], RInv[3] nop 0x0 } ;;// INNER LOOP 25 { .mfi nop 0x0 (pPipe[3]) fadd RF_Pot[1] = RF_Pot[1], RInv[2] nop 0x0 } { .mfi nop 0x0 (pPipe[5]) fma VNBTotal = C12[3], Rep_Y[1], VNBTotal nop 0x0 } ;;// INNER LOOP 26 { .mfi nop 0x0 (pPipe[2]) fmpy RSqr[1] = RSqr[1], Tabscale nop 0x0 } { .mfb nop 0x0 (pPipe[5]) fma VCTotal = Charge[5], RF_Pot[3], VCTotal br.ctop.sptk.many innerLoop } ;;// End of modulo-scheduled inner loop // Having finshed the loop, we now compute various quantities to // store. In paralllel, start computing computing some of the values // for the next loop trip, if we're going there.// OUTER EPILOGUE 1 { .mfi (pCont) shladd typePtr = II, 2, TYPE nop 0x0 (pCont) shladd II3 = II, 1, II } { .mfi (pCont) shladd chargePtr = II, 3, CHARGE nop 0x0 (pCont) shladd IS3 = IS, 1, IS } ;;// OUTER EPILOGUE 2 { .mfi (pCont) ld4 IS = [shiftPtr], 4 fadd FActIX = FActIX, FIX nop 0x0 } { .mmf (pCont) setf.sig f33 = NTYPE (pCont) ld4 II = [iinrPtr] ,4 fadd FShiftX = FShiftX, FIX } ;;// OUTER EPILOGUE 3 { .mfi (pCont) ld4 NTI = [typePtr] fadd FActIY = FActIY, FIY (pCont) shladd shiftVPtr = IS3, 3, SHIFTVEC } { .mfi nop 0x0 fadd FShiftY = FShiftY, FIY (pCont) shladd posPtr = II3, 3, POSITION } ;;// OUTER EPILOGUE 4 { .mfi nop 0x0 fadd FActIZ = FActIZ, FIZ nop 0x0 } { .mfi nop 0x0 fadd FShiftZ = FShiftZ, FIZ nop 0x0 } ;;// OUTER EPILOGUE 5 { .mmi stfd [FActII] = FActIX, 8 stfd [FShiftIS] = FShiftX, 8 nop 0x0 } { .mmi stfd [VCPtr] = VCTotal (pCont) ld4 ggid = [gidPtr], 4 nop 0x0 } ;;// OUTER EPILOGUE 6 { .mmi stfd [FActII] = FActIY, 8 stfd [FShiftIS] = FShiftY, 8 nop 0x0 } ;;// OUTER EPILOGUE 7 { .mmi stfd [FActII] = FActIZ stfd [VNBPtr] = VNBTotal (pCont) shladd FActII = II3, 3, FACTION } { .mib stfd [FShiftIS] = FShiftZ (pCont) shladd FShiftIS = IS3, 3, FSHIFT (pCont) br.cond.sptk.many outerLoop } ;; // Finish if this was the last chunk, or do another thread-loop iteration// THREAD EPILOGUE 1 { .mib nop 0x0 nop 0x0 (pMore) br.cond.sptk.many threadLoop } ;; // Ready to exit - restore the floating-point registers we saved, the // loop counter, and the predicates, then we're done. Note that the // stack pointer has the address of the last saved FP register.finish:// EXIT 1 { .mmi mov fillP0 = sp add fillP1 = 16, sp nop 0x0 } { .mmi st4 [OuterIter] = Nouter st4 [InnerIter] = Ninner nop 0x0 } ;;// EXIT 2 { .mmi ldf.fill fs12 = [fillP0], 32 ldf.fill fs11 = [fillP1], 32 nop 0x0 } ;;// EXIT 3 { .mmi ldf.fill fs10 = [fillP0], 32 ldf.fill fs9 = [fillP1], 32 nop 0x0 } ;;// EXIT 4 { .mmi ldf.fill fs8 = [fillP0], 32 ldf.fill fs7 = [fillP1], 32 nop 0x0 } ;;// EXIT 5 { .mmi ldf.fill fs6 = [fillP0], 32 ldf.fill fs5 = [fillP1], 32 mov ar.lc = LCSave } ;;// EXIT 6 { .mmi ldf.fill fs4 = [fillP0], 32 ldf.fill fs3 = [fillP1], 32 mov pr = PRSave, 0x1ffff } ;;// EXIT 7 { .mmi ldf.fill fs2 = [fillP0], 32 ldf.fill fs1 = [fillP1], 32 add sp = 12 * 16, sp } ;;// EXIT 8 { .mmb ldf.fill fs0 = [fillP0] nop 0x0 br.ret.sptk.few rp } ;; .endp nb_kernel230_ia64_double
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