编辑2.c

The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS nonvolatile electrically erasable memory. Thes

/* */
/* Input: None */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/
void Chip_Erase(void)
{
 WREN();
 Select_Serial_Memory(); /* enable device */
 SST_MasterIO(0x60); /* send Chip Erase command */
 Deselect_Serial_Memory(); /* disable device */
 Wait_Busy();
}


/*******************************************************************************/
/* PROCEDURE: Sector_Erase */
/* */
/* This procedure Sector Erases the Chip. */
/* */
/* Input: Dst: Destination Address 000000H - 07FFFFH */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/
void Sector_Erase(unsigned long Dst)
{
 WREN();
 Select_Serial_Memory(); /* enable device */
 SST_MasterIO(0x20); /* send Sector Erase command */
 SST_MasterIO((unsigned char)(((Dst & 0xFFFFFF) >> 16))); /* send 3 address bytes */
 SST_MasterIO((unsigned char)(((Dst & 0xFFFF) >> 8)));
 SST_MasterIO((unsigned char)(Dst & 0xFF));
 Deselect_Serial_Memory(); /* disable device */
 Wait_Busy();
}

/*******************************************************************************/
/* PROCEDURE: Block_Erase */
/* */
/* This procedure Block Erases the Chip. */
/* */
/* Input: Dst: Destination Address 000000H - 07FFFFH */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/
void Block_Erase(unsigned long Dst)
{
 WREN();
 Select_Serial_Memory(); /* enable device */
 SST_MasterIO(0x52); /* send Block Erase command */
 SST_MasterIO((unsigned char)(((Dst & 0xFFFFFF) >> 16))); /* send 3 address bytes */
 SST_MasterIO((unsigned char)(((Dst & 0xFFFF) >> 8)));
 SST_MasterIO((unsigned char)(Dst & 0xFF));
 Deselect_Serial_Memory(); /* disable device */
 Wait_Busy();
}

/*******************************************************************************/
/* PROCEDURE: Wait_Busy */
/* */
/* This procedure waits until device is no longer busy. */
/* */
/* Input: None */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/
void Wait_Busy()
{
 unsigned char i=0x00;
 while ((Read_Status_Register() & 0x03) == 0x03)
     {
          Read_Status_Register(); /* waste time until not busy */
          i++;
          if(i>100) return;              
          
     }

}
/*
void SPI_delay(unsigned char n)
{
 unsigned char i;
 for (i=0;i<n;i++)
  ;
}
*/
/*******************************************************************************/
/* PROCEDURE: SST_MasterIO */
/* */
/* This procedure handles byte transfer to and from */
/* the slave device. */
/* */
/* Input: None */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/

unsigned char SST_MasterIO_Rece()
{
 //unsigned char i,temp;
 register unsigned char D_back=0;
 register unsigned char i;
 for (i=0;i<8;i++)
 {
  D_back = D_back<<1;
  D_back = SPI_DO_PIN?(D_back | 0x01):(D_back & 0xfe);

  SPI_CK_H 
  NOP();
  NOP();
  SPI_CK_L
   
 }
 return D_back;
}



/*******************************************************************************/
/* PROCEDURE: SST_MasterIO */
/* */
/* This procedure handles byte transfer to and from */
/* the slave device. */
/* */
/* Input: None */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/

void SST_MasterIO(unsigned char SPI_out)
{
 //unsigned char i,temp;
// register unsigned char D_back=0;
 register char i;
unsigned char register  temp;
 temp = SPI_out;
 for (i=0;i<8;i++)
 {
  if (temp & 0x80)
   SPI_DI_H 
  else 
   SPI_DI_L 
  NOP();
 
  SPI_CK_H 
  temp = temp<<1;   
  SPI_CK_L
   
 }
}






/*******************************************************************************/
/* PROCEDURE: Read_Status_Register */
/* */
/* This procedure reads from Read_Status_Register. */
/* */
/* Input: None */
/* */
/* Returns: status byte */
/* */
/*******************************************************************************/

unsigned char Read_Status_Register(void)
{
unsigned char byte = 0;
Select_Serial_Memory();
SST_MasterIO(0x05); 
byte = SST_MasterIO_Rece(); 
Deselect_Serial_Memory(); 
return byte;
}

/*******************************************************************************/
/* PROCEDURE: HW_SPI_Init */
/* */
/* This procedure initializes the hardware SPI on the MCU. */
/* */
/* Input: None */
/* */
/* Returns: Nothing */
/* */
/*******************************************************************************/
void SST_SPI_Init(void )
{
// cbi(PORTB,PB1); // set SCK hi
// sbi(DDRB, PB1); // set SCK as output
// cbi(DDRB, PB3); // set MISO as input
// sbi(DDRB, PB2); // set MOSI as output
// sbi(DDRB, PB0); // SS must be output for Master mode to work
    
    
    SPI_CS_MODEOUT
    SPI_CS_H
    SPI_DO_MODEIN
    SPI_DO_H
    SPI_DI_MODEOUT
    SPI_DI_H
    SPI_CK_MODEOUT
    SPI_CK_L    


 Deselect_Serial_Memory(); /* disable device */
 //SPCR =0;
 //SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);  // 1/16
 //SPCR = (1<<SPE)|(1<<MSTR);
 WREN();
 EWSR();
 WRSR(0x00); 
}


/*********************************************************************************************
 PUT CHAR ARRAY
*********************************************************************************************/ 
/*! \brief  Write one or multiple bytes to the Serial SPI memory
 *
 *  This function check the validity of the first byte address location (out of range or write protected 
area).
 *  A read access to the serial SPI memory is performed to get the status register value. During this access 
the interrupt is disabled.
 *  As from the first SPI write access is started, the function returns.
 *  The management of the next SPI accesses and the write access completion are performed by the SPI 
interrupt handler.
 *  
 *  \note No page roll-over control is performed.
 *
 *  \param start_add  : destination address of the first byte
 *  \param nb_of_byte : number of bytes to be written decremented by one (this is for compatibility reason 
for devices with 256 bytes page size) 
 *  \param source :     pointer to the write buffer location
 *  \return  AccessStatus.
 *  \retval TRANSFER_STARTED    : the write sequence is started without error.
 *  \retval OUT_OF_RANGE        : the address is out of range of available memory.
 *  \retval BUSY                : the SPI memory or the SPI interface is busy.
 *  \retval DATA_WR_PROTECTED   : the address of the last byte to be written matches a write protected 
location.
*********************************************************************************************/
void  PutCharArray(unsigned long StartAddr, unsigned int  SendBytes, unsigned char* SourceAddr)
{ 
  unsigned int byteread_cnt;
  unsigned char * TempPtr ;
  TempPtr= SourceAddr ;
  WREN();
 Select_Serial_Memory(); /* enable device */
  SST_MasterIO(SPIFLASH_CMD_AAIP);     
      
 SST_MasterIO((unsigned char)(((StartAddr & 0xFFFFFF) >> 16))); /* send 3 address bytes */
 SST_MasterIO((unsigned char)(((StartAddr & 0xFFFF) >> 8)));
 SST_MasterIO((unsigned char)(StartAddr & 0xFF));
 
  SST_MasterIO((char)(*(TempPtr)));         //write a byte
  SST_MasterIO((char)(*(TempPtr+1)));         //write a byte
  
  Deselect_Serial_Memory();            // Pull high the chip select line of the SPI serial 
memory             

  for(byteread_cnt=2; byteread_cnt < SendBytes; byteread_cnt+=2)
  {
   Select_Serial_Memory();            // Pull down the chip select line of the SPI serial memory
   SST_MasterIO(SPIFLASH_CMD_AAIP);
   SST_MasterIO(*(TempPtr+byteread_cnt));
   SST_MasterIO(*(TempPtr+byteread_cnt+1));
   
      Deselect_Serial_Memory();            // Pull high the chip select line of the SPI serial memory        
  }  
  WRDI(); 
}

 
#endif