i21555.c

intel 21555PCI桥片驱动代码

*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_SecondaryDoorbellIrqMask(PCI_LOC *i21555_dev, int irq_bit)
	{
	UINT32 csrReg = 0;
	UINT16 irqBitMask = 0;
	int old_interface = 0;

	 /* check for valid bit number */
	if(irq_bit < 0 || irq_bit > 15) return;

	irqBitMask = 1 << irq_bit;

	/* if 21555 device not specified, use local device */
	if(i21555_dev == NULL)
		{
		i21555_dev = &i21555_localDev;
		old_interface = setCurrentPciInterface(PCI_LOCAL_INTERFACE);
		}

	/* get address of CSR registers */
	pciConfigInLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_CSR_IO_BAR, &csrReg);
	csrReg &= PCI_IOBASE_MASK;

	if(csrReg)
		{
		PCI_OUT_WORD(csrReg + I21555_CSR_SEC_SET_IRQ_MASK, irqBitMask);
		}
	
	if(old_interface) setCurrentPciInterface(old_interface);
	}


/**********************************************************************************************
*
* i21555_SecondaryDoorbellIrqUnmask - Unmask one of the Secondary Interface Doorbell Interrupts
*
* This function unmasks one of the 16 secondary doorbell interrupt bits. This function may
* operate on the local (on-board) 21555 or an off-board 21555. When operating on the
* local 21555 set i21555_dev = NULL. Otherwise, i21555_dev must point to the bus, device,
* and function of the 21555 to operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_SecondaryDoorbellIrqUnmask(PCI_LOC *i21555_dev, int irq_bit)
	{
	UINT32 csrReg = 0;
	UINT16 irqBitMask = 0;
	int old_interface = 0;

	 /* check for valid bit number */
	if(irq_bit < 0 || irq_bit > 15) return;

	irqBitMask = 1 << irq_bit;

	/* if 21555 device not specified, use local device */
	if(i21555_dev == NULL)
		{
		i21555_dev = &i21555_localDev;
		old_interface = setCurrentPciInterface(PCI_LOCAL_INTERFACE);
		}

	/* get address of CSR registers */
	pciConfigInLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_CSR_IO_BAR, &csrReg);
	csrReg &= PCI_IOBASE_MASK;

	if(csrReg)
		{
		PCI_OUT_WORD(csrReg + I21555_CSR_SEC_CLEAR_IRQ_MASK, irqBitMask);
		}
	
	if(old_interface) setCurrentPciInterface(old_interface);
	}


/**********************************************************************************************
*
* i21555_ReadScratchpadReg - Read one of the eight Scratchpad Registers
*
* This function reads one of the 8 32-bit scratchpad registers in the 21555. This function may
* operate on the local (on-board) 21555 or an off-board 21555. When operating on the
* local 21555 set i21555_dev = NULL. Otherwise, i21555_dev must point to the bus, device,
* and function of the 21555 to operate on.
*
*
* RETURNS: 32-Bit value stored in the scratchpad register.
*
* SEE ALSO: 
*/
UINT32 i21555_ReadScratchpadReg(PCI_LOC *i21555_dev, int reg)
	{
	UINT32 data = (UINT32) -1;
	UINT32 csrReg = 0;
	int old_interface = 0;

	 /* check for valid reg number */
	if(reg < 0 || reg > 7) return data;

	/* if 21555 device not specified, use local device */
	if(i21555_dev == NULL)
		{
		i21555_dev = &i21555_localDev;
		old_interface = setCurrentPciInterface(PCI_LOCAL_INTERFACE);
		}

	/* get address of CSR registers */
	pciConfigInLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_CSR_IO_BAR, &csrReg);
	csrReg &= PCI_IOBASE_MASK;

	if(csrReg)
		{
		data = PCI_IN_LONG(csrReg + I21555_CSR_SCRATCH0 + (4 * reg));
		}
	
	if(old_interface) setCurrentPciInterface(old_interface);
	return data;
	}


/**********************************************************************************************
*
* i21555_WriteScratchpadReg - Write to one of the eight Scratchpad Registers
*
* This function writes one of the 8 32-bit scratchpad registers in the 21555. This function may
* operate on the local (on-board) 21555 or an off-board 21555. When operating on the
* local 21555 set i21555_dev = NULL. Otherwise, i21555_dev must point to the bus, device,
* and function of the 21555 to operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteScratchpadReg(PCI_LOC *i21555_dev, int reg, UINT32 data)
	{
	UINT32 csrReg = 0;
	int old_interface = 0;

	 /* check for valid reg number */
	if(reg < 0 || reg > 7) return;

	/* if 21555 device not specified, use local device */
	if(i21555_dev == NULL)
		{
		i21555_dev = &i21555_localDev;
		old_interface = setCurrentPciInterface(PCI_LOCAL_INTERFACE);
		}

	/* get address of CSR registers */
	pciConfigInLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_CSR_IO_BAR, &csrReg);
	csrReg &= PCI_IOBASE_MASK;

	if(csrReg)
		{
		PCI_OUT_LONG(csrReg + I21555_CSR_SCRATCH0 + (4 * reg), data);
		}
	
	if(old_interface) setCurrentPciInterface(old_interface);
	}


/**********************************************************************************************
*
* i21555_WriteDownstreamMem0Setup - Write to the Downstream Memory 0 Setup Register
*
* This function writes to the downstream memory 0 setup register in the 21555. This register
* controls the behavior of the primary interface's BAR 0 register. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteDownstreamMem0Setup(PCI_LOC *i21555_dev, UINT32 size, int prefetch, int below_1MB)
	{
	UINT32 setupReg = ~(_4K - 1);

	/* i21555 device must be given, local 21555 register is not writable */
	if(i21555_dev == NULL) return;

	/* must be at least 4 KB for CSR registers */
	if(size > _4K) setupReg = ~(size - 1);

	/* set prefetchable bit */
	if(prefetch) setupReg |= BIT3;

	/* set bit that indicates the address must be below 1 MB */
	if(below_1MB) setupReg |= BIT1;

	/* write the setup register */
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_DS_MEM0_SETUP, setupReg);
	}


/**********************************************************************************************
*
* i21555_WriteDownstreamIoMem1Setup - Write to the Downstream I/O or Memory 1 Setup Register
*
* This function writes to the downstream I/O or memory 1 setup register in the 21555. This register
* controls the behavior of the primary interface's BAR 2 register. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteDownstreamIoMem1Setup(PCI_LOC *i21555_dev, int enable, UINT32 size, int prefetch,
				       int below_1MB, int io)
	{
	UINT32 setupReg = 0;

	/* i21555 device must be given, local 21555 register is not writable */
	if(i21555_dev == NULL) return;

	/* set size */
	setupReg = (~(size - 1)) & 0x7FFFFFC0;

	/* set enable bit */
	if(enable) setupReg |= BIT31;

	/* set prefetchable bit */
	if(prefetch) setupReg |= BIT3;

	/* set bit that indicates the address must be below 1 MB */
	if(below_1MB) setupReg |= BIT1;

	/* set as I/O space */
	if(io) setupReg |= BIT0;

	/* write the setup register */
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_DS_IO_MEM1_SETUP, setupReg);
	}


/**********************************************************************************************
*
* i21555_WriteDownstreamMem2Setup - Write to the Downstream Memory 2 Setup Register
*
* This function writes to the downstream memory 2 setup register in the 21555. This register
* controls the behavior of the primary interface's BAR 3 register. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteDownstreamMem2Setup(PCI_LOC *i21555_dev, int enable, UINT32 size, int prefetch, int below_1MB)
	{
	UINT32 setupReg = 0;

	/* i21555 device must be given, local 21555 register is not writable */
	if(i21555_dev == NULL) return;

	/* set size */
	setupReg = (~(size - 1)) & 0x7FFFF000;

	/* set enable bit */
	if(enable) setupReg |= BIT31;

	/* set prefetchable bit */
	if(prefetch) setupReg |= BIT3;

	/* set bit that indicates the address must be below 1 MB */
	if(below_1MB) setupReg |= BIT1;

	/* write the setup register */
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_DS_MEM2_SETUP, setupReg);
	}


/**********************************************************************************************
*
* i21555_WriteDownstreamMem3Setup - Write to the Downstream Memory 3 Setup Registers
*
* This function writes to the downstream memory 3 setup registers in the 21555. These registers
* control the behavior of the primary interface's BAR 4 and 5 registers. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteDownstreamMem3Setup(PCI_LOC *i21555_dev, int enable, UINT32 size_hi,
				     UINT32 size_lo, int prefetch, int type)
	{
	UINT32 setupRegLo = 0;
	UINT32 setupRegHi = 0;

	/* i21555 device must be given, local 21555 register is not writable */
	if(i21555_dev == NULL) return;

	if(type == 2) /* 64-Bit BAR */
		{
		/* set size */
		setupRegLo = (~(size_lo - 1)) & 0xFFFFF000;
		setupRegHi = (~(size_hi - 1)) & 0x7FFFFFFF;

		/* set enable bit */
		if(enable) setupRegHi |= BIT31;
		}

	else /* 32-Bit BAR */
		{
		/* set size */
		setupRegLo = (~(size_lo - 1)) & 0x7FFFF000;

		/* set enable bit */
		if(enable) setupRegLo |= BIT31;

		/* set bit that indicates the address must be below 1 MB */
		if(type == 1) setupRegLo |= BIT1;
		}

	/* set prefetchable bit */
	if(prefetch) setupRegLo |= BIT3;

	/* write the setup registers */
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_DS_MEM3_SETUP_LO, setupRegLo);
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_DS_MEM3_SETUP_HI, setupRegHi);
	}


/**********************************************************************************************
*
* i21555_WriteUpstreamIoMem0Setup - Write to the Upstream I/O or Memory 0 Setup Register
*
* This function writes to the upstream I/O or memory 0 setup register in the 21555. This register
* controls the behavior of the secondary interface's BAR 2 register. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*
* RETURNS: NA.
*
* SEE ALSO: 
*/
void i21555_WriteUpstreamIoMem0Setup(PCI_LOC *i21555_dev, int enable, UINT32 size, int prefetch,
				       int below_1MB, int io)
	{
	UINT32 setupReg = 0;

	/* i21555 device must be given, local 21555 register is not writable */
	if(i21555_dev == NULL) return;

	/* set size */
	setupReg = (~(size - 1)) & 0x7FFFFFC0;

	/* set enable bit */
	if(enable) setupReg |= BIT31;

	/* set prefetchable bit */
	if(prefetch) setupReg |= BIT3;

	/* set bit that indicates the address must be below 1 MB */
	if(below_1MB) setupReg |= BIT1;

	/* set as I/O space */
	if(io) setupReg |= BIT0;

	/* write the setup register */
	pciConfigOutLong(i21555_dev->bus, i21555_dev->device, i21555_dev->function,
		I21555_CONFIG_US_IO_MEM0_SETUP, setupReg);
	}


/**********************************************************************************************
*
* i21555_WriteUpstreamMem1Setup - Write to the Upstream Memory 1 Setup Register
*
* This function writes to the upstream memory 1 setup register in the 21555. This register
* controls the behavior of the secondary interface's BAR 3 register. Since the setup registers
* are not writable from the primary interface, this function can only operate on an off-board
* 21555. Therefore, i21555_dev must point to the bus, device, and function of the 21555 to
* operate on.
*
*