gtpci.h

intel 21555PCI桥片驱动代码

/* BAR structure */
typedef struct _pciBar
{
    unsigned int function;
    unsigned int barOffset;
    unsigned int barBaseLow;
    unsigned int barBaseHigh;
    unsigned int barSizeLow;
    unsigned int barSizeHigh;
    /* The 'barBaseAddr' is a 64-bit variable
       that will contain the TOTAL base address
       value achived by combining both the 'barBaseLow'
       and the 'barBaseHigh' parameters as follows:

       BIT: 63          31         0
            |           |         |
            barBaseHigh barBaseLow */
    unsigned long long barBaseAddr;
    /* The 'barSize' is a 64-bit variable
       that will contain the TOTAL size achived
       by combining both the 'barSizeLow' and
       the 'barSizeHigh' parameters as follows:

       BIT: 63          31         0
            |           |         |
            barSizeHigh barSizeLow

       NOTE: The total size described above
             is AFTER the size calculation as
             described in PCI spec rev2.2 */
    unsigned long long barSize;
    bool               isPrefetchable;
    PCI_BAR_TYPE       barType;
    PCI_BAR_MAPPING    barMapping;

} PCI_BAR;

/* Device information structure */
typedef struct _pciDevice
{
    /* Device specific information */
    char         type[60];
    unsigned int classCode;
    unsigned int busNumber;
    unsigned int deviceNum;
    unsigned int venID;
    unsigned int deviceID;
    unsigned int revisionID;
    bool         isMultiFunction;
    bool         isFastB2BCapable;
    PCI_BUS_FREQ busFrequency;
    PCI_BAR      pciBar[43]; /* BARs list */
} PCI_DEVICE;

/* PCI gloabl functions */
void         gtPciGetClassName(unsigned int classCode, char *pType);
unsigned int gtPciGetBusNumber(unsigned int pciInterfaceNumber);
unsigned int gtPciGetDevNumber(unsigned int pciInterfaceNumber);

/* Returns the PCI bus mode (PCI-X or conventional PCI) with its frequancy */
PCI_BUS_MODE gtPciGetBusMode(unsigned int pciInterfaceNumber);

/* PCI0 functions    */

/* Read/write from/to configuration registers of an agent over local PCI
   bus. */
void gtPci0WriteConfigReg(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned int data);
void gtPci0WriteConfigWord(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned short data);
void gtPci0WriteConfigByte(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned char data);

unsigned int gtPci0ReadConfigReg(unsigned int regOffset,unsigned int pciDevNum);

/* Read/write from/to configuration registers over another PCI bus
  (over PCI bridge). */
void gtPci0OverBridgeWriteConfigReg(unsigned int regOffset,
                                    unsigned int pciDevNum,
                                    unsigned int busNum,unsigned int data);
void gtPci0OverBridgeWriteConfigWord(unsigned int regOffset,
                                    unsigned int pciDevNum,
                                    unsigned int busNum,unsigned short data);
void gtPci0OverBridgeWriteConfigByte(unsigned int regOffset,
                                    unsigned int pciDevNum,
                                    unsigned int busNum,unsigned char data);

unsigned int gtPci0OverBridgeReadConfigReg(unsigned int regOffset,
                                           unsigned int pciDevNum,
                                           unsigned int busNum);

/* Performs a full scan on both PCIs and returns all possible details on the
   agents found on the bus. */
void gtPci0ScanDevices(PCI_DEVICE *pciDetect,unsigned int numberOfElment);

/* Set new base(32/64-bit) and size for internal PCI BAR.   */
bool gtPci0SetInternalBAR(PCI_INTERNAL_BAR pciBAR, unsigned int BARbaseLow,
                           unsigned int BARbaseHigh, unsigned int BARsize);

void gtPci0DisableInternalBAR(PCI_INTERNAL_BAR pciBAR);
void gtPci0EnableInternalBAR(PCI_INTERNAL_BAR pciBAR);

/* Set base (32/64-bit), size and attributes for one of the access regions. */
bool  gtPci0SetRegionFeatures(PCI_ACCESS_REGIONS region,unsigned int features,
                              unsigned int baseAddressLow,
                              unsigned int baseAddressHigh,
                              unsigned int regionSize);

void gtPci0DisableAccessRegion(PCI_ACCESS_REGIONS region);

/* PCI arbiter */
#ifdef INCLUDE_PCI_0_ARBITER

void gtPci0ArbiterEnable(void);
void gtPci0ArbiterDisable(void);

void gtPci0ParkingDisable(PCI_AGENT_PARK internalAgent,
                          PCI_AGENT_PARK externalAgent0,
                          PCI_AGENT_PARK externalAgent1,
                          PCI_AGENT_PARK externalAgent2,
                          PCI_AGENT_PARK externalAgent3,
                          PCI_AGENT_PARK externalAgent4,
                          PCI_AGENT_PARK externalAgent5);

bool gtPci0EnableBrokenAgentDetection(unsigned char brokenValue);
void gtPci0DisableBrokenAgentDetection(void);

#endif /* INCLUDE_PCI_0_ARBITER */

#ifdef INCLUDE_P2P
/* PCI-to-PCI (P2P) */
void gtPci0P2PConfig(unsigned int SecondBusLow,unsigned int SecondBusHigh,
                     unsigned int busNum,unsigned int devNum);
#endif /* INCLUDE_P2P */

#ifdef INCLUDE_PCI_1
/* PCI1 functions    */

/* Read/write from/to configuration registers of an agent over local PCI
   bus. */
void gtPci1WriteConfigReg(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned int data);
void gtPci1WriteConfigWord(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned short data);
void gtPci1WriteConfigByte(unsigned int regOffset,unsigned int pciDevNum,
                          unsigned char data);

unsigned int gtPci1ReadConfigReg(unsigned int regOffset,
                                  unsigned int pciDevNum);

/* Read/write from/to configuration registers over another PCI bus
  (over PCI bridge). */
void gtPci1OverBridgeWriteConfigReg(unsigned int regOffset,
                                    unsigned int pciDevNum,
                                    unsigned int busNum,unsigned int data);

unsigned int gtPci1OverBridgeReadConfigReg(unsigned int regOffset,
                                           unsigned int pciDevNum,
                                           unsigned int busNum);

/* Performs a full scan on both PCIs and returns all possible details on the
   agents found on the bus. */
void gtPci1ScanDevices(PCI_DEVICE *pciDetect,unsigned int numberOfElment);

/* Set new base (32/64-bit) and size for internal PCI BAR (32/64-bit).   */
bool gtPci1SetInternalBAR(PCI_INTERNAL_BAR pciBAR, unsigned int BARbaseLow,
                          unsigned int BARbaseHigh, unsigned int BARsize);

void gtPci1DisableInternalBAR(PCI_INTERNAL_BAR pciBAR);
void gtPci1EnableInternalBAR(PCI_INTERNAL_BAR pciBAR);

/* Set base (32/64-bit), size and attributes for one of the access regions. */
bool gtPci1SetRegionFeatures(PCI_ACCESS_REGIONS region,unsigned int features,
                             unsigned int baseAddressLow,
                             unsigned int baseAddressHigh,
                             unsigned int regionSize);

void gtPci1DisableAccessRegion(PCI_ACCESS_REGIONS region);

/* PCI arbiter */
#ifdef INCLUDE_PCI_1_ARBITER

void gtPci1ArbiterEnable(void);
void gtPci1ArbiterDisable(void);

void gtPci1ParkingDisable(PCI_AGENT_PARK internalAgent,
                          PCI_AGENT_PARK externalAgent0,
                          PCI_AGENT_PARK externalAgent1,
                          PCI_AGENT_PARK externalAgent2,
                          PCI_AGENT_PARK externalAgent3,
                          PCI_AGENT_PARK externalAgent4,
                          PCI_AGENT_PARK externalAgent5);

bool gtPci1EnableBrokenAgentDetection(unsigned char brokenValue);
void gtPci1DisableBrokenAgentDetection(void);

#endif /* INCLUDE_PCI_1_ARBITER */

#ifdef INCLUDE_P2P
/* PCI-to-PCI (P2P) */
void gtPci1P2PConfig(unsigned int SecondBusLow,unsigned int SecondBusHigh,
                     unsigned int busNum,unsigned int devNum);
#endif /* INCLUDE_P2P */
#endif /* INCLUDE_PCI_1 */

#ifdef __cplusplus
}
#endif

#endif /* __INCgtPcih */