sdi.c

S3C2410 USB Mass storage 源码.

//#include "f_system.h"
//#ifdef _READ_SD_

#include "2410addr.h"
#include "2410lib.h"
#include "def.h"

//#include "f_fat.h"
//#include "f_filesystem.h"

#include "sdi.h"


#define INICLK	400000//300000
#define NORCLK	5000000

#define POL	0
#define INT	1
#define DMA	2


U8 *Tx_buffer;	//128[word]*16[blk]=8192[byte]
U8 *Rx_buffer;	//128[word]*16[blk]=8192[byte]
volatile unsigned int rd_cnt;
volatile unsigned int wt_cnt;
volatile unsigned int block = 1;
volatile unsigned int TR_end=0;

int Wide=0; // 0:1bit, 1:4bit
int MMC=0;  // 0:SD  , 1:MMC

int  Maker_ID;
char Product_Name[7]; 
int  Serial_Num;

volatile int RCA;

U32 start_num = 0;

void Test_SDI(void)
{
#if 0

	FAT_HANDLE *pHandle;
	u32 totalfilenum = 0, i = 0;
	u8 buffer[512] = {0};
	

    	RCA=0;
    	MMC=0;

    	rGPEUP  = 0xf83f;     // The pull up
    	rGPECON = 0xaaaaaaaa;

    	Uart_Printf("\n[SDI test]\n");
    
    	if(!SDI_CardInit())
		return;
	{
		F_FileSYS_Initial(0);

		pHandle  = F_FAT_GetCurrentFolder();
		F_FileSYS_FolderScan(pHandle);

		totalfilenum = F_FileSYS_GetTotalFilenum();
		Uart_Printf("total file number = %d\n",totalfilenum);

		if(totalfilenum >0)
		{
			F_FileSYS_Dir(pHandle, 0, &totalfilenum,"MP3");
			//start_num +=totalfilenum;
			Uart_Printf("totalfilenum = %d\n",totalfilenum);
			if(totalfilenum == 0)
				Uart_Printf("No file you wanted..\n");
			else
			{
				for(i = 0;i < totalfilenum; i++)
				{
					Uart_Printf("[%02d]: \tFile:%s\tstart_cluster:%08x\tfilesize:%d\n",i,g_FileInfo[i].fileInfo.fileINF_Name,g_FileInfo[i].fileInfo.fileINF_start_cluster,g_FileInfo[i].fileInfo.fileINF_size);
				}
			}
			Uart_Printf("========================================================\n");
		}
	}
		
    	Card_sel_desel(0);	// Card deselect

    	if(!CMD9())
		Uart_Printf("Get CSD fail!!!\n");
    	rSDIDCON=0;//tark???
    	rSDICSTA=0xffff;
#endif
}


U8 SDI_CardEnable(void)// 0:for OK , and 1 is fail
{
	RCA=0;
    	MMC=0;

    	rGPEUP  = 0xf83f;     // The pull up
    	rGPECON = 0xaaaaaaaa;
    
    	if(!SDI_CardInit())
		return  1;
	return 0;
}

U8 SDI_CardDisable(void)
{
	Card_sel_desel(0);	// Card deselect

    	if(!CMD9())
	{
		Uart_Printf("Get CSD fail!!!\n");
		return 1;
    	}
    	rSDIDCON=0;//tark???
    	rSDICSTA=0xffff;
}

int SDI_CardInit(void)
{
	int i;
    	char key;

    	rSDIPRE=PCLK/(2*INICLK)-1;	// 400KHz
    	rSDICON=(1<<4)|(1<<1)|1;	// Type B, FIFO reset, clk enable
    	rSDIBSIZE=0x200;		// 512byte(128word)
    	rSDIDTIMER=0xffff;		// Set timeout count

    	for(i=0;i<0x2000;i++);  // Wait 74SDCLK for MMC card

    	CMD0();
    	Uart_Printf("\nIn idle\n");

    	if(Chk_MMC_OCR()) 
    	{
		Uart_Printf("\nIn MMC ready\n");
		MMC=1;
		goto RECMD2;
    	}

    	if(Chk_SD_OCR()) 
        	Uart_Printf("\nIn SD ready\n");
    	else
    	{
		Uart_Printf("\nInitialize fail\nNo Card assertion\n");
        	return 0;
    	}

RECMD2:
    	//-- Check attaced cards, it makes card identification state
    	rSDICARG=0x0;   // CMD2(stuff bit)
    	rSDICCON=(0x1<<10)|(0x1<<9)|(0x1<<8)|0x42; //lng_resp, wait_resp, start, CMD2

    	//-- Check end of CMD2
    	if(!Chk_CMDend(2, 1)) 
		goto RECMD2;
    	//rSDICSTA=0xa00;	// Clear cmd_end(with rsp)


    	Uart_Printf("\nEnd id\n");

RECMD3:
    	//--Send RCA
    	rSDICARG=MMC<<16;	    // CMD3(MMC:Set RCA, SD:Ask RCA-->SBZ)
    	rSDICCON=(0x1<<9)|(0x1<<8)|0x43;	// sht_resp, wait_resp, start, CMD3

    	//-- Check end of CMD3
    	if(!Chk_CMDend(3, 1)) 
		goto RECMD3;
    	//rSDICSTA=0xa00;	// Clear cmd_end(with rsp)

    	//--Publish RCA
    	if(MMC) 
		RCA=1;
    	else 
		RCA=( rSDIRSP0 & 0xffff0000 )>>16;
    	Uart_Printf("RCA=0x%x\n",RCA);

    	//--State(stand-by) check
    	if( rSDIRSP0 & 0x1e00!=0x600 )  // CURRENT_STATE check
		goto RECMD3;
    
    	Uart_Printf("\nIn stand-by\n");
    
    	rSDIPRE=PCLK/(2*NORCLK)-1;	// Normal clock=25MHz

    	Card_sel_desel(1);	// Select

    	if(!MMC)
		Set_4bit_bus();
    	else
		Set_1bit_bus();

    	return 1;
}

void SDI_WriteSector(U8 Index, U32 LBA_Start, U16 LBA_Length, U8 * Buffer)
{
    	U32 mode;
    	int status;

    	wt_cnt=0;    
    	rSDICON |= rSDICON|(1<<1);	// FIFO reset

	rSDIDCON=(1<<20)|(1<<17)|(Wide<<16)|(3<<12)|(LBA_Length<<0);
		    // Tx after rsp, blk, 4bit bus, Tx start, blk num

    	rSDICARG=LBA_Start * 512;	    // CMD24/25(addr)

	if(LBA_Length<2)	// SINGLE_WRITE
	{
		do
		{
			rSDICCON=(0x1<<9)|(0x1<<8)|0x58;	//sht_resp, wait_resp, dat, start, CMD24
		}while(!Chk_CMDend(24, 1));	//-- Check end of CMD24
	}
	else	// MULTI_WRITE
	{
		do
		{
			rSDICCON=(0x1<<9)|(0x1<<8)|0x59;	//sht_resp, wait_resp, dat, start, CMD25
		}while(!Chk_CMDend(25, 1));	//-- Check end of CMD25
	}
    
	while(wt_cnt<128*LBA_Length)
	{
		status=rSDIFSTA;
		if((status&0x2000)==0x2000) 
		{
			//rSDIDAT=*((u32 *)(&Buffer[0]));
			rSDIDAT=(U32)(((*Buffer++<<24)&0xFF000000)|((*Buffer++<<16)&0x00FF0000)|((*Buffer++<<8)&0x0000FF00)|((*Buffer++)&0xFF));
			//Buffer+=4;
			wt_cnt++;
		}
	}
    
   	 //-- Check end of DATA
    	if(!Chk_DATend()) 
		Uart_Printf("dat error\n");

    	rSDIDSTA=0x10;	// Clear data Tx/Rx end

    	if(LBA_Length>1)
    	{
	//--Stop cmd(CMD12)
		do
		{
			rSDIDCON=(1<<18)|(1<<17)|(0<<16)|(1<<12)|(LBA_Length<<0);
		
			rSDICARG=0x0;	    //CMD12(stuff bit)
			rSDICCON=(0x1<<9)|(0x1<<8)|0x4c;    //sht_resp, wait_resp, start, CMD12

		//-- Check end of CMD12
		}while(!Chk_CMDend(12, 1)) ;
		//-- Check end of DATA(with busy state)
		if(!Chk_BUSYend()) 
			Uart_Printf("error\n");
		rSDIDSTA=0x08;
    	}
}


void Wt_Block(void)
{
    	U32 mode;
    	int status;

    	wt_cnt=0;    
    	Uart_Printf("[Block write test]\n");

RE1:
    	Uart_Printf("0:Polling write   1:Interrupt write   2:DMA write\nSelect the test mode?");
    	mode=(U32)Uart_GetIntNum();
    	Uart_Printf("\n");

    	if(mode>2)
		goto RE1;

    	rSDICON |= rSDICON|(1<<1);	// FIFO reset

    	if(mode!=2)
		rSDIDCON=(1<<20)|(1<<17)|(Wide<<16)|(3<<12)|(block<<0);
		    // Tx after rsp, blk, 4bit bus, Tx start, blk num

    	rSDICARG=0x0;	    // CMD24/25(addr)

REWTCMD:
   	switch(mode)
    	{
		case POL:
	   		if(block<2)	// SINGLE_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x58;	//sht_resp, wait_resp, dat, start, CMD24
				if(!Chk_CMDend(24, 1))	//-- Check end of CMD24
		    			goto REWTCMD;
	    		}
	    		else	// MULTI_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x59;	//sht_resp, wait_resp, dat, start, CMD25
				if(!Chk_CMDend(25, 1))	//-- Check end of CMD25
		    			goto REWTCMD;	    
	    		}
	    
	    		while(wt_cnt<128*block)
	    		{
				status=rSDIFSTA;
				if((status&0x2000)==0x2000) 
				{
		    			rSDIDAT=*Tx_buffer++;
		    			wt_cnt++;
				}
	    		}
	    		break;
	
		case INT:
	    		pISR_SDI=(unsigned)Wt_Int;
	    		rINTMSK = ~(BIT_SDI);

	    		rSDIIMSK=0x10;  // Tx FIFO half int.

	    		if(block<2)	    // SINGLE_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x58;    //sht_resp, wait_resp, dat, start, CMD24
				if(!Chk_CMDend(24, 1))	//-- Check end of CMD24
		    			goto REWTCMD;
	    		}
	    		else	    // MULTI_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x59;    //sht_resp, wait_resp, dat, start, CMD25
				if(!Chk_CMDend(25, 1))	//-- Check end of CMD25 
		    			goto REWTCMD;
	    		}

	    		while(!TR_end);
	    			rINTMSK |= (BIT_SDI);
	    		TR_end=0;
	    		rSDIIMSK=0;	// All mask
	    		break;

		case DMA:
	    		pISR_DMA0=(unsigned)DMA_end;
	    		rINTMSK = ~(BIT_DMA0);

	    		rDISRC0=*Tx_buffer;	// Tx_buffer
	    		rDISRCC0=(0<<1)+(0<<0);	// AHB, inc
	    		rDIDST0=(U32)(SDIDAT);	// SDIDAT
	    		rDIDSTC0=(1<<1)+(1<<0);	// APB, fix
	    		rDCON0=(1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(1<<22)+(2<<20)+128*block;
		    	rDMASKTRIG0=(0<<2)+(1<<1)+0;    //no-stop, DMA0 channel on, no-sw trigger
	    
	    		rSDIDCON=(1<<20)|(1<<17)|(Wide<<16)|(1<<15)|(3<<12)|(block<<0);
	    		if(block<2)	    // SINGLE_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x58;    //sht_resp, wait_resp, dat, start, CMD24
				if(!Chk_CMDend(24, 1))	//-- Check end of CMD24
		    			goto REWTCMD;	    
	    		}
	    		else	    // MULTI_WRITE
	    		{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x59;    //sht_resp, wait_resp, dat, start, CMD25
				if(!Chk_CMDend(25, 1))	//-- Check end of CMD25 
		    			goto REWTCMD;	    
	    		}

	    		while(!TR_end);		

	    		rINTMSK |= (BIT_DMA0);
	    		TR_end=0;
	    		rDMASKTRIG0=(1<<2);	//DMA0 stop

	    		break;

		default:
	    		break;
    	}
    
   	 //-- Check end of DATA
    	if(!Chk_DATend()) 
		Uart_Printf("dat error\n");

    	rSDIDSTA=0x10;	// Clear data Tx/Rx end

    	if(block>1)
    	{
	//--Stop cmd(CMD12)
REWCMD12:    
		rSDIDCON=(1<<18)|(1<<17)|(0<<16)|(1<<12)|(block<<0);
		
		rSDICARG=0x0;	    //CMD12(stuff bit)
		rSDICCON=(0x1<<9)|(0x1<<8)|0x4c;    //sht_resp, wait_resp, start, CMD12

		//-- Check end of CMD12
		if(!Chk_CMDend(12, 1)) 
		    goto REWCMD12;
		//-- Check end of DATA(with busy state)
		if(!Chk_BUSYend()) 
		    Uart_Printf("error\n");
		rSDIDSTA=0x08;
    	}
}

void SDI_ReadSector(U8 Index, U32 LBA_Start, U16 LBA_Length, U8 * Buffer)
{
    	U32 mode, tmpdata = 0;
    	int status;
//--> A
    	rd_cnt=0;    

    	rSDICON |= rSDICON|(1<<1);	// FIFO reset

	rSDIDCON=(1<<19)|(1<<17)|(Wide<<16)|(2<<12)|(LBA_Length<<0);
		// Rx after cmd, blk, 4bit bus, Rx start, blk num

    	rSDICARG=LBA_Start * 512;	// CMD17/18(addr)
// --> B
    	if(LBA_Length<2)	// SINGLE_READ
    	{
    		do
    		{
			rSDICCON=(0x1<<9)|(0x1<<8)|0x51;    // sht_resp, wait_resp, dat, start, CMD17
    		}while(!Chk_CMDend(17, 1));
    	}
   	else	// MULTI_READ
    	{
    		do
    		{
			rSDICCON=(0x1<<9)|(0x1<<8)|0x52;    // sht_resp, wait_resp, dat, start, CMD18
		}while(!Chk_CMDend(18, 1));	//-- Check end of CMD18 
    	}
//--> C
    	while(rd_cnt<128*LBA_Length)	// 512*block bytes
    	{
		if((rSDIDSTA&0x20)==0x20) // Check timeout 
		{
	    		rSDIDSTA=0x1<<0x5;  // Clear timeout flag
	    		break;
		}
		status=rSDIFSTA;
		if((status&0x1000)==0x1000)	// Is Rx data?
		{
	    		//*Rx_buffer++=rSDIDAT;
	    		tmpdata=rSDIDAT;
			*Buffer++ = (tmpdata>>24)&0xFF;
			*Buffer++ = (tmpdata>>16)&0xFF;
			*Buffer++ = (tmpdata>>8)&0xFF;
			*Buffer++ = tmpdata&0xFF;					
	    		rd_cnt++;
		}
    	}
    //-- Check end of DATA
    	if(!Chk_DATend()) 
		Uart_Printf("dat error\n");
//--> D
    	rSDIDSTA=0x10;	// Clear data Tx/Rx end

    	if(LBA_Length>1)
    	{
		do
		{
			rSDICARG=0x0;	    //CMD12(stuff bit)
			rSDICCON=(0x1<<9)|(0x1<<8)|0x4c;//sht_resp, wait_resp, start, CMD12
			//-- Check end of CMD12
		}while(!Chk_CMDend(12, 1)); 
    	}
}

void Rd_Block(void)
{
    	U32 mode, tmpdata = 0;
    	int status;

    	rd_cnt=0;    
    	Uart_Printf("[Block read test]\n");

RE0:
    	Uart_Printf("0:Polling read   1:Interrupt read   2:DMA read\nSelect the test mode?");
    	mode=(U32)Uart_GetIntNum();
    	Uart_Printf("\n");

    	if(mode>2)
		goto RE0;

    	rSDICON |= rSDICON|(1<<1);	// FIFO reset

    	if(mode!=2)
		rSDIDCON=(1<<19)|(1<<17)|(Wide<<16)|(2<<12)|(block<<0);
		// Rx after cmd, blk, 4bit bus, Rx start, blk num

    	rSDICARG=0;	// CMD17/18(addr)

RERDCMD:
    	switch(mode)
    	{
		case POL:
		    	if(block<2)	// SINGLE_READ
		    	{
		    		Uart_Printf("single_read\n");
				rSDICCON=(0x1<<9)|(0x1<<8)|0x51;    // sht_resp, wait_resp, dat, start, CMD17
				if(!Chk_CMDend(17, 1))	//-- Check end of CMD17
			    		goto RERDCMD;	    
		    	}
		   	else	// MULTI_READ
		    	{
				rSDICCON=(0x1<<9)|(0x1<<8)|0x52;    // sht_resp, wait_resp, dat, start, CMD18
				if(!Chk_CMDend(18, 1))	//-- Check end of CMD18 
			    		goto RERDCMD;
		    	}

		    	//rSDICSTA=0xa00;	// Clear cmd_end(with rsp)	    
		    	while(rd_cnt<128*block)	// 512*block bytes
		    	{
		    		Uart_Printf("=%x,",rSDIDCNT);
				if((rSDIDSTA&0x20)==0x20) // Check timeout 
				{
					Uart_Printf("time out!\n");
			    		rSDIDSTA=0x1<<0x5;  // Clear timeout flag
			    		break;
				}
				
				status=rSDIFSTA;
				if((status&0x1000)==0x1000)	// Is Rx data?
				{
			    		//*Rx_buffer++=rSDIDAT;
			    		tmpdata=rSDIDAT;
					{
						*Rx_buffer++ = (tmpdata>>24)&0xFF;
						*Rx_buffer++ = (tmpdata>>16)&0xFF;
						*Rx_buffer++ = (tmpdata>>8)&0xFF;
						*Rx_buffer++ = tmpdata&0xFF;					
					}
					rd_cnt++;
				}
				
		    	}