ixethaccend.c

intel xscale 425的bsp源码

/* ixEthAccEnd.c - ixEthAccEnd END  network interface driver */

/* Copyright 1984-2002 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01z,09sep04,m_h  Support access library 1.5 (OSAL)
01y,09apr04,vf   Added support for ixEthDB half-bridge
01x,12dec03,m_h  Insure m_nextpkt is NULL for RX.
01w,14aug03,scm  modify MACROs for diab compatibility...
01w,12aug03,m_h  polled RFC 2233
01v,24jul03,m_h  Remove references to Intel's previous naming convention
01u,21jul03,m_h  2233 MIB support
01t,09jul03,m_h  multicast
01s,02jul03,m_h  Little Endian, padding
01r,04apr03,m_h  Major revision supports access library 1.2.1
01q,28oct02,jb  Deal with chained xmit buffers
01p,25oct02,jb  Tuning shutdown
01o,17oct02,jb  Revise buffer mgmnt to allow loaning
01n,18sep02,jb  Changing Rx buffer queue size
01m,18sep02,jb  Adding cache mgmt to xmit and rearranging cache mgmt for recv
01l,01aug02,jb  Fixing sysToMonitor, adding Multicast support, .etc
01k,31jul02,jb  Fixing name errors
01j,31jul02,jb  Adding rx Buffer list overflow checking
01i,17jul02,jb  Renamed file, renaming bsp specific routines to segregate access
                 library
01h,12oct99,dat  SPR 28492, fixed ixEthAccEndSend.
01i,29mar99,dat  documentation, SPR 26119. fixed .bS/.bE usage
01h,28feb99,pul  changed the prototype for END NET functions, to have END_OBJ
         reference as the first argument rather than device object,
         fix for SPR#24285
01g,17feb99,dat  documentation, removed beta warning
01f,29sep98,dat  Fixed problem in PollRx relating to SPR 22325.
01e,28sep98,dat  SPR 22325, system mode transition, plus fixed warnings
         and IxEthAccEnd is now compilable (SPR 22204).
01d,17jul98,db   changed "holder"in ixEthAccEndParse from char** to char *.
         fixed references to "holder"in ixEthAccEndParse(spr #21464).
01c,15oct97,gnn  revised to reflect the latest API changes.
01b,05may97,dat  added TODO's for documentation and macros.
01a,04feb97,gnn  written.
*/

/*
DESCRIPTION


The macro SYS_INT_DISCONNECT is used to disconnect the interrupt handler prior
to unloading the module.  By default this is a dummy routine that
returns OK.

The macro SYS_INT_ENABLE is used to enable the interrupt level for the
end device.  It is called once during initialization.  By default this is
the routine sysLanIntEnable(), defined in the module sysLib.o.

The macro SYS_ENET_ADDR_GET is used to get the ethernet address (MAC)
for the device.  The single argument to this routine is the END_DEVICE
pointer.  By default this routine copies the ethernet address stored in
the global variable sysIxEthAccEndEnetAddr into the END_DEVICE structure.

INCLUDES:
end.h endLib.h etherMultiLib.h

SEE ALSO: LoadLib, endLib
.I "Writing and Enhanced Network Driver"
*/


/* includes */

#include "vxWorks.h"
#include "stdlib.h"
#include "cacheLib.h"
#include "intLib.h"
#include "end.h"                       /* Common END structures. */
#include "endLib.h"
#include "lstLib.h"                    /* Needed to maintain protocol list. */
#include "wdLib.h"
#include "iv.h"
#include "semLib.h"
#include "etherLib.h"
#include "logLib.h"
#include "netLib.h"
#include "stdio.h"
#include "sysLib.h"
#include "errno.h"
#include "errnoLib.h"
#include "memLib.h"
#include "iosLib.h"
#undef ETHER_MAP_IP_MULTICAST
#include "etherMultiLib.h"             /* multicast stuff. */

#include "net/mbuf.h"
#include "net/unixLib.h"
#include "net/protosw.h"
#include "net/systm.h"
#include "net/if_subr.h"
#include "net/route.h"
#include "netinet/ip_var.h"

#include "sys/socket.h"
#include "sys/ioctl.h"
#include "sys/times.h"

#include "ixp425.h"
#include "IxEthAcc.h"
#include "IxOsal.h"
#include "IxEthDB.h"
#include "IxFeatureCtrl.h"


#include "config.h"

#ifdef INCLUDE_IXETHACCEND

#define IXEETHACC_MULTICAST_ENABLE

#ifdef INCLUDE_SHOW_ROUTINES
#ifdef INCLUDE_NET_SHOW
#include "netShow.h"
#endif
#endif

/* 
 * ----------------------------------------------
 * General settings sections 
 */

/* 
 * Defines cacheability of mBlks/mBufs and cBlks
 *
 * Define to enable cached Headers and buffers 
 */
#define IXE_CACHED_RX_BUFFERS_ENABLE

#undef DEBUG
#undef IXP_DRV_DEBUG
#undef IXP_DRV_DEBUG_MBUFS  /* mbuf traffic trace */

/*
 * end of general settings 
 * ----------------------------------------------
 */

/* enable patch to handle recovery from IP packets
 * fragmentation. It seems to not be needed in T2.2. The 
 * IP stack does not hold packets for a while.
 */
#undef  IXETHACCEND_FRAG_RECOVERY

/* check the cache implemetation is compatible with
 * the access layer settings
 */

/* During dependancy generation, this can cause problems */
#ifdef IXE_CACHED_RX_BUFFERS_ENABLE
#define IX_ACC_CACHE_ENABLED	/*donleo*/
#ifdef IX_ACC_CACHE_ENABLED
/* both components use cached mbufs */
#else
#error "END driver cache setting not compatible with ethAcc settings (CSR_BASE may be incorrect)"
#endif
#else
#ifdef IX_ACC_CACHE_ENABLED
#error "END driver cache setting not compatible with ethAcc settings (CSR_BASE may be incorrect)"
#else
/* both components use uncached mbufs */
#endif
#endif


#ifdef INCLUDE_WINDVIEW
/* Wind view event logging */

#include "wvLib.h"

/* Event definitions for Windview */
#define IXE_EVT_RCV_HANDLE_ENTRY                1000
#define IXE_EVT_RCV_RECEIVE_LOOP_TOP            1001
#define IXE_EVT_RCV_RECEIVE_LOOP_CACHEOPS       1002
#define IXE_EVT_RCV_RECEIVE_LOOP_BOTTOM         1003
#define IXE_EVT_RCV_REPLENISH_LOOP_TOP          1004
#define IXE_EVT_RCV_REPLENISH_LOOP_TUPLEGET     1005
#define IXE_EVT_RCV_REPLENISH_LOOP_CACHEOPS     1006
#define IXE_EVT_RCV_REPLENISH_LOOP_BOTTOM       1007
#define IXE_EVT_RCV_HANDLE_EXIT                 1008

#define IXE_EVT_XMT_SEND_ENTRY                  1200
#define IXE_EVT_XMT_CACHEOPS                    1201
#define IXE_EVT_XMT_SEND_EXIT                   1202

#define IXE_EVT_XMT_DONECALLBACK_ENTRY          200
#define IXE_EVT_XMT_DONECALLBACK_EXIT           201
#define IXE_EVT_XMT_REPLENISH_NETJOBADD         202
#define IXE_EVT_XMT_REPLENISH_NETJOBADDFAIL     203

#define IXE_EVT_RCV_CALLBACK_ENTRY              100
#define IXE_EVT_RCV_CALLBACK_CACHEOPS           101
#define IXE_EVT_RCV_CALLBACK_NETJOBADD          102
#define IXE_EVT_RCV_CALLBACK_RINGADD            103
#define IXE_EVT_RCV_CALLBACK_EXIT               104
#define IXE_EVT_RCV_CALLBACK_NETJOBADDFAIL      105

static UINT32 cts = 0; /* Current Timestamp */
static UINT32 lcts = 0; /* Last Timestamp */
static UINT32 dcts = 0; /* Difference */
#define DO_EVENT(evt) { \
    cts = *((volatile int *)IXP425_OSTS); \
    dcts = cts - lcts; \
    lcts = cts; \
    wvEvent(evt,(char *)&cts,4); \
    }
#else

#define DO_EVENT(evt)

#endif /* INCLUDE_WINDVIEW */

IMPORT  int endMultiLstCnt (END_OBJ* pEnd);
IMPORT  void dumpMbufPtr(M_BLK *mBufPtr);
IMPORT  IX_STATUS ixdp425EthLibInit();
IMPORT  IX_STATUS ixdp425EthLibLoad(int port);
IMPORT  IX_STATUS ixdp425EthLibUnload(int port);
IMPORT  IX_STATUS ixdp425EthLibStart(int port);
IMPORT  IX_STATUS ixdp425EthLibStop(int port);
IMPORT  BOOL ixdp425EthLibInitialised;
IMPORT  UINT32 ixEthAccPhyAddresses[IX_ETH_ACC_NUMBER_OF_PORTS];

/* entry points for aligned buffer pool carving (ixOsBufLib.c) */
IMPORT  POOL_FUNC * _pIxOsBufLibPoolFuncTbl;

#define IXP425_END_CACHE_INVALIDATE(address, len) \
        cacheInvalidate(DATA_CACHE,address,len)
#define IXP425_END_CACHE_FLUSH(address, len) \
        cacheFlush(DATA_CACHE,address,len)

/* Force Quad align for Ip packet headers */
#define ALIGN_MDATA(ptr) (void *)((UINT32)ptr + 2)
/* Extra buffer length needed to accomodate Ip alignment */
#define ALIGN_MLEN 4

#ifdef IXE_CACHED_RX_BUFFERS_ENABLE

#ifndef _DIAB_TOOL
#define PREFETCH(address) __asm volatile ("pld [%0]": : "r"(address))
#else
__asm volatile void PREFETCH(volatile void *address)
{
% reg address;
        pld [address]
}
#endif

#else

#define PREFETCH(address) 

#endif IXE_CACHED_RX_BUFFERS_ENABLE

#define IXP425_END_CACHE_PHYS_TO_VIRT(address)  (address)
#define IXP425_END_CACHE_VIRT_TO_PHYS(address) (address)

/* defines */

/* Configuration items */

#define IXP_EH_SIZE     ENET_HDR_REAL_SIZ
#define END_BUFSIZ      (ETHERMTU + IXP_EH_SIZE + 6)
#define END_SPEED_10M   10000000        /* 10Mbs */
#define END_SPEED_100M  100000000       /* 100Mbs */
#define END_SPEED       END_SPEED_10M

/*
 * Default macro definitions for BSP interface.
 * These macros can be redefined in a wrapper file, to generate
 * a new module with an optimized interface.
 */

/* Macro to connect interrupt handler to vector */

/* Macro to disconnect interrupt handler from vector */

LOCAL VOID dummyIsr (void) {};

#ifndef SYS_INT_DISCONNECT
    #define SYS_INT_DISCONNECT(pDrvCtrl,rtn,arg,pResult) \
        { \
        IMPORT STATUS intConnect(); \
        *pResult = intConnect ((VOIDFUNCPTR *)INUM_TO_IVEC (pDrvCtrl->ivec), \
                             dummyIsr, (int)arg); \
        }
#endif


/* Macro to enable the appropriate interrupt level */

#ifndef SYS_INT_ENABLE
    #define SYS_INT_ENABLE(pDrvCtrl) \
        { \
        IMPORT void sysLanIntEnable(); \
        sysLanIntEnable (pDrvCtrl->ilevel); \
        }
#endif

/* Macro to get the ethernet address from the BSP */

#ifndef SYS_ENET_ADDR_GET
    #define SYS_ENET_ADDR_GET(pDevice) \
        { \
        ixEthAccPortUnicastMacAddressGet((IxEthAccPortId)pDevice->unit, \
                                         (IxEthAccMacAddr *)&pDevice->enetAddr); \
        }
#endif

/*
 * Macros to do a short (UINT16) access to the chip. Default
 * assumes a normal memory mapped device.
 */

#ifndef IxEthAccEnd_OUT_SHORT
    #define IxEthAccEnd_OUT_SHORT(pDrvCtrl,addr,value) \
        (*(USHORT *)addr = value)
#endif

#ifndef IxEthAccEnd_IN_SHORT
    #define IxEthAccEnd_IN_SHORT(pDrvCtrl,addr,pData) \
        (*pData = *addr)
#endif

#ifdef INCLUDE_RFC_2233
#define END_HADDR(pEnd)                                                  \
        ((pEnd)->pMib2Tbl->m2Data.mibIfTbl.ifPhysAddress.phyAddress)

#define END_HADDR_LEN(pEnd)                                              \
        ((pEnd)->pMib2Tbl->m2Data.mibIfTbl.ifPhysAddress.addrLength)

#define END_INC_IN_DISCARDS()         (pDrvCtrl->endMIBStats.ifInDiscards++)
#define END_INC_IN_ERRS()             (pDrvCtrl->endMIBStats.ifInErrors++)
#define END_INC_IN_UCAST(mData, mLen) (pDrvCtrl->endMIBStats.ifInUcastPkts++)
#define END_INC_IN_MCAST(mData, mLen) (pDrvCtrl->endMIBStats.ifInMulticastPkts++)
#define END_INC_IN_BCAST(mData, mLen) (pDrvCtrl->endMIBStats.ifInBroadcastPkts++)
#define END_INC_IN_OCTETS(mLen)       (pDrvCtrl->endMIBStats.ifInOctets += mLen)

#define END_INC_OUT_DISCARDS()        (pDrvCtrl->endMIBStats.ifOutDiscards++)
#define END_INC_OUT_ERRS()            (pDrvCtrl->endMIBStats.ifOutErrors++)
#define END_INC_OUT_UCAST(mData, mLen)(pDrvCtrl->endMIBStats.ifOutUcastPkts++)
#define END_INC_OUT_MCAST(mData, mLen)(pDrvCtrl->endMIBStats.ifOutMulticastPkts++)
#define END_INC_OUT_BCAST(mData, mLen)(pDrvCtrl->endMIBStats.ifOutBroadcastPkts++)
#define END_INC_OUT_OCTETS(mLen)     (pDrvCtrl->endMIBStats.ifOutOctets += mLen)
            
#else /*INCLUDE_RFC_2233*/

/* RFC 1213 mib2 interface */

#define END_HADDR(pEnd)                                             \
        ((pEnd)->mib2Tbl.ifPhysAddress.phyAddress)

#define END_HADDR_LEN(pEnd)                                         \
        ((pEnd)->mib2Tbl.ifPhysAddress.addrLength)

#define END_INC_IN_ERRS()                                              \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_IN_ERRS, +1)
#define END_INC_IN_DISCARDS()                                          \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_IN_ERRS, +1)
#define END_INC_IN_UCAST(mData, mLen)                                  \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_IN_UCAST, +1)

#define END_INC_IN_MCAST(mData, mLen)                                 \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_IN_UCAST, +1)    
#define END_INC_IN_BCAST(mData, mLen)                                 \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_IN_UCAST, +1)    
#define END_INC_IN_OCTETS(mLen)
            
#define END_INC_OUT_ERRS()                                             \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_OUT_ERRS, +1)
            
#define END_INC_OUT_DISCARDS()                                         \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_OUT_ERRS, +1)
            
#define END_INC_OUT_UCAST(mData, mLen)                                 \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_OUT_UCAST, +1)
#define END_INC_OUT_MCAST(mData, mLen)                                \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_OUT_UCAST, +1)
#define END_INC_OUT_BCAST(mData, mLen)                                \
            END_ERR_ADD(&pDrvCtrl->end, MIB2_OUT_UCAST, +1)
#define END_INC_OUT_OCTETS(mLen)        

#endif /* INCLUDE_RFC_2233 */