📄 i8255a.sim.rpt
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; |i8255A|Data[5]~2 ; |i8255A|Data[5]~2 ; dataout ;
; |i8255A|Data[5]~2 ; |i8255A|Data[5]~output ; padio ;
; |i8255A|Mux33~47 ; |i8255A|Mux33~47 ; dataout ;
+--------------------------+--------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+--------------------------+--------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+--------------------------+--------------------------+------------------+
; |i8255A|RegBOut[0] ; |i8255A|RegBOut[0] ; dataout ;
; |i8255A|RegBOut[1] ; |i8255A|RegBOut[1] ; dataout ;
; |i8255A|RegBOut[2] ; |i8255A|RegBOut[2] ; dataout ;
; |i8255A|RegBOut[3] ; |i8255A|RegBOut[3] ; dataout ;
; |i8255A|RegBOut[7] ; |i8255A|RegBOut[7] ; dataout ;
; |i8255A|RegAOut[2] ; |i8255A|RegAOut[2] ; dataout ;
; |i8255A|StateCHi ; |i8255A|StateCHi ; dataout ;
; |i8255A|Mux40~92 ; |i8255A|Mux40~92 ; dataout ;
; |i8255A|Mux36~92 ; |i8255A|Mux36~92 ; dataout ;
; |i8255A|Mux35~92 ; |i8255A|Mux35~92 ; dataout ;
; |i8255A|StateCLo ; |i8255A|StateCLo ; dataout ;
; |i8255A|StateB ; |i8255A|StateB ; dataout ;
; |i8255A|RegBOut[4] ; |i8255A|RegBOut[4] ; dataout ;
; |i8255A|RegBOut[5] ; |i8255A|RegBOut[5] ; dataout ;
; |i8255A|RegBOut[6] ; |i8255A|RegBOut[6] ; dataout ;
; |i8255A|StateA ; |i8255A|StateA ; dataout ;
; |i8255A|RegAOut[5] ; |i8255A|RegAOut[5] ; dataout ;
; |i8255A|RegAOut[6] ; |i8255A|RegAOut[6] ; dataout ;
; |i8255A|Mux38~92 ; |i8255A|Mux38~92 ; dataout ;
; |i8255A|Mux39~92 ; |i8255A|Mux39~92 ; dataout ;
; |i8255A|Mux33~20sexpand0 ; |i8255A|Mux33~20sexpand0 ; dataout ;
; |i8255A|CS ; |i8255A|CS ; dataout ;
; |i8255A|RD ; |i8255A|RD ; dataout ;
; |i8255A|AD[0] ; |i8255A|AD[0] ; dataout ;
; |i8255A|AD[1] ; |i8255A|AD[1] ; dataout ;
; |i8255A|Data[0]~7 ; |i8255A|Data[0]~7 ; dataout ;
; |i8255A|Data[1]~6 ; |i8255A|Data[1]~6 ; dataout ;
; |i8255A|Data[2]~5 ; |i8255A|Data[2]~5 ; dataout ;
; |i8255A|Data[2]~5 ; |i8255A|Data[2]~output ; padio ;
; |i8255A|Data[3]~4 ; |i8255A|Data[3]~4 ; dataout ;
; |i8255A|Data[3]~4 ; |i8255A|Data[3]~output ; padio ;
; |i8255A|Data[4]~3 ; |i8255A|Data[4]~3 ; dataout ;
; |i8255A|Data[7]~0 ; |i8255A|Data[7]~0 ; dataout ;
; |i8255A|Data[7]~0 ; |i8255A|Data[7]~output ; padio ;
; |i8255A|PA[2]~5 ; |i8255A|PA[2]~5 ; dataout ;
; |i8255A|PA[2]~5 ; |i8255A|PA[2]~output ; padio ;
; |i8255A|PA[3]~4 ; |i8255A|PA[3]~4 ; dataout ;
; |i8255A|PA[5]~2 ; |i8255A|PA[5]~2 ; dataout ;
; |i8255A|PA[5]~2 ; |i8255A|PA[5]~output ; padio ;
; |i8255A|PA[6]~1 ; |i8255A|PA[6]~1 ; dataout ;
; |i8255A|PA[6]~1 ; |i8255A|PA[6]~output ; padio ;
; |i8255A|PA[7]~0 ; |i8255A|PA[7]~0 ; dataout ;
; |i8255A|PB[0]~7 ; |i8255A|PB[0]~7 ; dataout ;
; |i8255A|PB[0]~7 ; |i8255A|PB[0]~output ; padio ;
; |i8255A|PB[1]~6 ; |i8255A|PB[1]~6 ; dataout ;
; |i8255A|PB[1]~6 ; |i8255A|PB[1]~output ; padio ;
; |i8255A|PB[2]~5 ; |i8255A|PB[2]~5 ; dataout ;
; |i8255A|PB[2]~5 ; |i8255A|PB[2]~output ; padio ;
; |i8255A|PB[3]~4 ; |i8255A|PB[3]~4 ; dataout ;
; |i8255A|PB[3]~4 ; |i8255A|PB[3]~output ; padio ;
; |i8255A|PB[4]~3 ; |i8255A|PB[4]~3 ; dataout ;
; |i8255A|PB[4]~3 ; |i8255A|PB[4]~output ; padio ;
; |i8255A|PB[5]~2 ; |i8255A|PB[5]~2 ; dataout ;
; |i8255A|PB[5]~2 ; |i8255A|PB[5]~output ; padio ;
; |i8255A|PB[6]~1 ; |i8255A|PB[6]~1 ; dataout ;
; |i8255A|PB[6]~1 ; |i8255A|PB[6]~output ; padio ;
; |i8255A|PB[7]~0 ; |i8255A|PB[7]~0 ; dataout ;
; |i8255A|PB[7]~0 ; |i8255A|PB[7]~output ; padio ;
; |i8255A|pch[0]~3 ; |i8255A|pch[0]~3 ; dataout ;
; |i8255A|pch[0]~3 ; |i8255A|pch[0]~output ; padio ;
; |i8255A|pch[1]~2 ; |i8255A|pch[1]~2 ; dataout ;
; |i8255A|pch[1]~2 ; |i8255A|pch[1]~output ; padio ;
; |i8255A|pch[2]~1 ; |i8255A|pch[2]~1 ; dataout ;
; |i8255A|pch[2]~1 ; |i8255A|pch[2]~output ; padio ;
; |i8255A|pch[3]~0 ; |i8255A|pch[3]~0 ; dataout ;
; |i8255A|pch[3]~0 ; |i8255A|pch[3]~output ; padio ;
; |i8255A|pcl[0]~3 ; |i8255A|pcl[0]~3 ; dataout ;
; |i8255A|pcl[0]~3 ; |i8255A|pcl[0]~output ; padio ;
; |i8255A|pcl[1]~2 ; |i8255A|pcl[1]~2 ; dataout ;
; |i8255A|pcl[1]~2 ; |i8255A|pcl[1]~output ; padio ;
; |i8255A|pcl[2]~1 ; |i8255A|pcl[2]~1 ; dataout ;
; |i8255A|pcl[2]~1 ; |i8255A|pcl[2]~output ; padio ;
; |i8255A|pcl[3]~0 ; |i8255A|pcl[3]~0 ; dataout ;
; |i8255A|pcl[3]~0 ; |i8255A|pcl[3]~output ; padio ;
; |i8255A|SCh ; |i8255A|SCh ; padio ;
; |i8255A|SCl ; |i8255A|SCl ; padio ;
; |i8255A|SB ; |i8255A|SB ; padio ;
; |i8255A|SA ; |i8255A|SA ; padio ;
; |i8255A|Data[5]~2 ; |i8255A|Data[5]~2 ; dataout ;
; |i8255A|Data[5]~2 ; |i8255A|Data[5]~output ; padio ;
; |i8255A|Data[6]~1 ; |i8255A|Data[6]~1 ; dataout ;
; |i8255A|Data[6]~1 ; |i8255A|Data[6]~output ; padio ;
; |i8255A|Mux33~47 ; |i8255A|Mux33~47 ; dataout ;
+--------------------------+--------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Web Edition
Info: Processing started: Sat Nov 11 18:38:10 2006
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off i8255a -c i8255a
Info: Inverted registers were found during simulation
Info: Register: |i8255A|StateCHi
Info: Register: |i8255A|StateCLo
Info: Register: |i8255A|StateB
Info: Register: |i8255A|StateA
Warning: Found logic contention at time 0 ps on bus node "|i8255A|Data[0]"
Info: Node "Data[0]~output" has logic level of 0
Info: Node "Data[0]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|Data[1]"
Info: Node "Data[1]~output" has logic level of 0
Info: Node "Data[1]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|Data[3]"
Info: Node "Data[3]~output" has logic level of 0
Info: Node "Data[3]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|Data[4]"
Info: Node "Data[4]~output" has logic level of 0
Info: Node "Data[4]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|Data[7]"
Info: Node "Data[7]~output" has logic level of 0
Info: Node "Data[7]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|PA[2]"
Info: Node "PA[2]~output" has logic level of 0
Info: Node "PA[2]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|PA[3]"
Info: Node "PA[3]~output" has logic level of 0
Info: Node "PA[3]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|PA[6]"
Info: Node "PA[6]~output" has logic level of 0
Info: Node "PA[6]" has logic level of 1
Warning: Found logic contention at time 0 ps on bus node "|i8255A|PA[7]"
Info: Node "PA[7]~output" has logic level of 0
Info: Node "PA[7]" has logic level of 1
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Warning: Found logic contention at time 48.0 ns on bus node "|i8255A|PA[0]"
Info: Node "PA[0]~output" has logic level of X
Info: Node "PA[0]" has logic level of 0
Warning: Found logic contention at time 48.0 ns on bus node "|i8255A|PA[1]"
Info: Node "PA[1]~output" has logic level of X
Info: Node "PA[1]" has logic level of 0
Warning: Found logic contention at time 48.0 ns on bus node "|i8255A|PA[3]"
Info: Node "PA[3]~output" has logic level of X
Info: Node "PA[3]" has logic level of 1
Warning: Found logic contention at time 48.0 ns on bus node "|i8255A|PA[4]"
Info: Node "PA[4]~output" has logic level of X
Info: Node "PA[4]" has logic level of 0
Warning: Found logic contention at time 48.0 ns on bus node "|i8255A|PA[7]"
Info: Node "PA[7]~output" has logic level of X
Info: Node "PA[7]" has logic level of 1
Warning: Found logic contention at time 63.0 ns on bus node "|i8255A|PA[3]"
Info: Node "PA[3]~output" has logic level of 0
Info: Node "PA[3]" has logic level of 1
Warning: Found logic contention at time 63.0 ns on bus node "|i8255A|PA[7]"
Info: Node "PA[7]~output" has logic level of 0
Info: Node "PA[7]" has logic level of 1
Warning: Found logic contention at time 72.0 ns on bus node "|i8255A|Data[0]"
Info: Node "Data[0]~output" has logic level of X
Info: Node "Data[0]" has logic level of 1
Warning: Found logic contention at time 72.0 ns on bus node "|i8255A|Data[1]"
Info: Node "Data[1]~output" has logic level of X
Info: Node "Data[1]" has logic level of 1
Warning: Found logic contention at time 72.0 ns on bus node "|i8255A|Data[4]"
Info: Node "Data[4]~output" has logic level of X
Info: Node "Data[4]" has logic level of 1
Warning: Found logic contention at time 87.0 ns on bus node "|i8255A|Data[0]"
Info: Node "Data[0]~output" has logic level of 0
Info: Node "Data[0]" has logic level of 1
Warning: Found logic contention at time 87.0 ns on bus node "|i8255A|Data[1]"
Info: Node "Data[1]~output" has logic level of 0
Info: Node "Data[1]" has logic level of 1
Warning: Found logic contention at time 87.0 ns on bus node "|i8255A|Data[4]"
Info: Node "Data[4]~output" has logic level of 0
Info: Node "Data[4]" has logic level of 1
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 1.92 %
Info: Number of transitions in simulation is 220
Info: Vector file i8255a.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 22 warnings
Info: Processing ended: Sat Nov 11 18:38:11 2006
Info: Elapsed time: 00:00:01
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