wtmpeg4ch.c

motorola MCF5249+IME6400的视频采集系统的视频驱动程序,可实时采集4路CIF视频

//************************************************************************************************
//*                                                                                                                 *
//*  IME6400 Video Caputure Card General Purpose Bus driver                      *
//*                                                                                                                 *
//*  Copyright (C) 2003 LiaoRongtao <[e-mail]>                           *
//*                                                                                                                 *
//*  Operation System:uClinux (Kernel V2.4)                                                  *
//*  Last Update Date:2004/03/04                                                                *
//*  Description:                                                                                             *
//*       1.In all of the program I havn't take the big- or little-                             *
//*         endian problem into account.Because I now don't know the trait        *
//*         of the  driver.    (Now this problem has been fixed)                            *
//*       2.IIC initial:                                                                                         *
//*       3.This driver now can just work under default parameters for               *
//*         testing.So the IOCTL_INIPARM will be modified later. (This               *
//*         task has been moved to user program)                                             *
//*       4.Registers accessing:Direct  memory access through the true            *
//*         address.                                                                                          *
//***********************************************************************************************
//*   define _MCF5249_  : using mcf5249 board
//*   define _ENDIANTRANS_: need ENDIAN TRANS
//*
//*
//*
//*
//*******************************************************************************************
#include <linux/config.h>

#ifndef __KERNEL__
#  define __KERNEL__
#endif

#ifdef   MODULE
#include <linux/version.h>
#include <linux/module.h>
#endif

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/slab.h>   /* kmalloc() */
#include <linux/string.h>
#include <linux/errno.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/delay.h>
#include <linux/kmod.h>
#include <linux/fs.h>
#include <linux/ioctl.h>
#include <linux/wait.h>
#include <linux/sched.h>

#include <linux/init.h>

/*
 *	Read will do some smarts later on. Buffer pin etc.
 */


//********************************************
//**********        for multiDesign                     *****
//**  _AP5200_  for  the board use ap5200
//**  _MCF5249_  for the core board mcf5249
//**  _ENDIANTRANS_ for the board ime6400 need tranverse
//**  _HHETH_ for _HHETH_ board (gpio)

#ifndef _MCF5249_
#define _MCF5249_
#endif

//#ifndef _ENDIANTRANS_
//#define _ENDIANTRANS_
//#endif
#undef  _ENDIANTRANS_

//#define _HHETH_

//#define DEBUG 1
#undef DEBUG

//***************************************************************


#ifdef DEBUG
#define PDEBUG(fmt, args...) printk("KDEBUG: "fmt, ##args)
#else
#define PDEBUG(fmt, args...)	
#endif

#define DEVICEMAJOR 254
//DATA TYPE DEFINE
#define DWORD volatile  unsigned long
#define BYTE  volatile  unsigned char
#define WORD volatile unsigned short

//////////////////////////////////////////////////////
#ifdef  _MCF5249_
//*****mcf5249********************** 
//Define base address
#define IME_MBAR 0x30000000
#define MCF_MBAR 0x10000000
#define MCF_MBAR2 0x80000000
//Register define
#define BaseAddress0 (0x12<<1)
#define BaseAddress1 (0x14<<1)
#define Status (0x1e<<1)
#define Data (0x02<<1)
#define Command 0x00
#define User0 (0x04<<1)
#define User4 (0x0c<<1)
#define User3 (0x0a<<1)
#define EncodedStream (0x10<<1)

#ifdef _HHETH_
#define IrqID  161
#else
#define IrqID  162
#endif

static int ta_wait = 3;

#ifdef MODULE
MODULE_PARM (ta_wait, "i");
MODULE_PARM_DESC (ta_wait, "clocks to insert before internal /TA!!!");
#endif
#define WAITLENTH(x) ((x<<10)|0x0180)
//function
#define MCFWriteReg(dIndex, dValue) M5272WriteReg(dIndex, dValue)
#define MCFReadReg(dIndex) M5272ReadReg(dIndex)
#define MCFReadMem(dAddr) M5272ReadMem(dAddr)

//interrupt level set: origin -original value; x - level ; y - station
#define   INTLEVEL_SET(origin,x,y) (origin&~(0x0000000f<<4*y)|(x<<4*y))


// Chip Select registers (in MBA)
#define MCFSIM_CSAR0		0x80		/* CS 0 Address 0 reg (r/w) */
#define MCFSIM_CSMR0		0x84		/* CS 0 Mask 0 reg (r/w) */
#define MCFSIM_CSCR0		0x8a		/* CS 0 Control reg (r/w) */
#define MCFSIM_CSAR1		0x8c		/* CS 1 Address reg (r/w) */
#define MCFSIM_CSMR1		0x90		/* CS 1 Mask reg (r/w) */
#define MCFSIM_CSCR1		0x96		/* CS 1 Control reg (r/w) */
/*
 *	General purpose IO registers (in MBAR2).
 */
#define	MCFSIM2_GPIOREAD	0x0		/* GPIO read values */
#define	MCFSIM2_GPIOWRITE	0x4		/* GPIO write values */
#define	MCFSIM2_GPIOENABLE	0x8		/* GPIO enabled */
#define	MCFSIM2_GPIOFUNC	0xc		/* GPIO function */
#define	MCFSIM2_GPIO1READ	0xb0		/* GPIO1 read values */
#define	MCFSIM2_GPIO1WRITE	0xb4		/* GPIO1 write values */
#define	MCFSIM2_GPIO1ENABLE	0xb8		/* GPIO1 enabled */
#define	MCFSIM2_GPIO1FUNC	0xbc		/* GPIO1 function */

#define	MCFSIM2_GPIOINTSTAT	0xc0		/* GPIO interrupt status */
#define	MCFSIM2_GPIOINTCLEAR	0xc0		/* GPIO interrupt clear */
#define	MCFSIM2_GPIOINTENABLE	0xc4		/* GPIO interrupt enable */

#define	MCFSIM2_INTLEVEL1	0x140		/* Interrupt level reg 1 */
#define	MCFSIM2_INTLEVEL2	0x144		/* Interrupt level reg 2 */
#define	MCFSIM2_INTLEVEL3	0x148		/* Interrupt level reg 3 */
#define	MCFSIM2_INTLEVEL4	0x14c		/* Interrupt level reg 4 */
#define	MCFSIM2_INTLEVEL5	0x150		/* Interrupt level reg 5 */
#define	MCFSIM2_INTLEVEL6	0x154		/* Interrupt level reg 6 */
#define	MCFSIM2_INTLEVEL7	0x158		/* Interrupt level reg 7 */
#define	MCFSIM2_INTLEVEL8	0x15c		/* Interrupt level reg 8 */

#else
//*****mcf5272**********************
//Define base address
#define IME_MBAR 0x01000000
#define MCF_MBAR 0x10000000
//Register define
#define BaseAddress0 0x12
#define BaseAddress1 0x14
#define Status 0x1e
#define Data 0x02
#define Command 0x00
#define User0 0x04
#define EncodedStream 0x10
#define User4 0x0c
#define User3 0x0a

#define IrqID  67
//fuctions
#define MCFWriteReg(dIndex, dValue) M5272WriteReg(dIndex, dValue)
#define MCFReadReg(dIndex) M5272ReadReg(dIndex)
#define MCFReadMem(dAddr) M5272ReadMem(dAddr)
#endif

//#define FirmwareSize 14292

DECLARE_WAIT_QUEUE_HEAD(wq);
DWORD dEncode=IME_MBAR + EncodedStream;


WORD wLoop=0;
WORD nInt=0;

#define LEAFLET 32   //8k
#define BLOCK 2048  //每个队列128个524小块，共4个队列
#define NR_QUEUE   64  //(BLOCK/LEAFLET)


unsigned char * StreamPool;  //buffer 
int nRd=0;
int nWrt=0;
int nBlock=0;


#ifdef _ENDIANTRANS_
WORD  Reverse16(WORD wValue)
{
  WORD wLower8,wRet;
  wLower8=wValue&0xFF;
  wRet=(wLower8<<8)|(wValue>>8);
  return wRet;
}
#else
#define Reverse16(wValue) wValue
#endif

void M5272WriteReg(DWORD dIndex,DWORD dValue)
{
  DWORD dRegAddr;
  dRegAddr=MCF_MBAR + dIndex;
  *((DWORD *)dRegAddr)=dValue;
   //printf("WriteReg:write register %x successful!\n",dIndex);
  return;
}

DWORD M5272ReadReg(DWORD dIndex)
{
  DWORD dRegAddr;
  DWORD dwRet;

  dRegAddr=MCF_MBAR + dIndex;
  dwRet=*((DWORD *)dRegAddr);
 return dwRet;
}

DWORD M5272ReadMem(DWORD dAddr)
{
    DWORD dwRet;
   dwRet=*((DWORD *)dAddr);
    return dwRet;
}
void I6400WriteReg(DWORD dIndex,WORD wValue)
{
  DWORD dRegAddr=IME_MBAR + dIndex;
  *((WORD *)dRegAddr)=Reverse16(wValue);//Byte sequence change to little-endian
  return;
}

WORD I6400ReadReg(DWORD dIndex)
{
  WORD wValue;
  DWORD dRegAddr=IME_MBAR + dIndex;
  wValue=*((WORD *)dRegAddr);
  return Reverse16(wValue);//Byte sequence change to big-endian
}

WORD I6400ReadMem(DWORD dAddr)
{
  WORD wRet;
  WORD wUpper16,wLower16;
  wUpper16=dAddr>>16;
  wLower16=dAddr&0xFFFF;
  I6400WriteReg(BaseAddress1,wUpper16);
  I6400WriteReg(BaseAddress0,wLower16);
  I6400WriteReg(Command,0x00);
  while((I6400ReadReg(Status)&0x0001)==0);
  wRet=I6400ReadReg(Data);
  return wRet;
}

void I6400WriteMem(DWORD dAddr,WORD wValue)
{
  WORD wUpper16,wLower16;
  wUpper16=dAddr>>16;
  wLower16=dAddr&0xFFFF;
  I6400WriteReg(BaseAddress1,wUpper16);
  I6400WriteReg(BaseAddress0,wLower16);
  I6400WriteReg(Data,wValue);
  I6400WriteReg(Command,0x01);
  while((I6400ReadReg(Status)&0x0001)==0);
   //printf("Write IME6400 Address %x successfully\n",dAddr);
  return;
}