cic5.mdl

来自「五接CIC滤波器的simulink仿真」· MDL 代码 · 共 1,271 行 · 第 1/3 页

      Decimation	      "1"
      FrameMode		      "Concatenate frames (2-D array)"
      FixptAsFi		      off
    }
    Block {
      BlockType		      Reference
      Name		      "Signal To\nWorkspace1"
      Ports		      [1]
      Position		      [540, 523, 595, 557]
      FontName		      "Arial"
      SourceBlock	      "dspsnks4/Signal To\nWorkspace"
      SourceType	      "Signal To Workspace"
      ShowPortLabels	      on
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      VariableName	      "yout1"
      MaxDataPoints	      "inf"
      Decimation	      "1"
      FrameMode		      "Concatenate frames (2-D array)"
      FixptAsFi		      off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum"
      Ports		      [2, 1]
      Position		      [605, 230, 625, 250]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "-+|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum1"
      Ports		      [2, 1]
      Position		      [715, 230, 735, 250]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "-+|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum2"
      Ports		      [2, 1]
      Position		      [825, 230, 845, 250]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "-+|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum3"
      Ports		      [2, 1]
      Position		      [935, 230, 955, 250]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "-+|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum4"
      Ports		      [2, 1]
      Position		      [1045, 230, 1065, 250]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "-+|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum5"
      Ports		      [2, 1]
      Position		      [1040, 450, 1060, 470]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      IconShape		      "round"
      Inputs		      "++|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum6"
      Ports		      [2, 1]
      Position		      [930, 450, 950, 470]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      IconShape		      "round"
      Inputs		      "++|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum7"
      Ports		      [2, 1]
      Position		      [820, 450, 840, 470]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      IconShape		      "round"
      Inputs		      "++|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum8"
      Ports		      [2, 1]
      Position		      [710, 450, 730, 470]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      IconShape		      "round"
      Inputs		      "++|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Sum
      Name		      "Sum9"
      Ports		      [2, 1]
      Position		      [595, 450, 615, 470]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      IconShape		      "round"
      Inputs		      "++|"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Reference
      Name		      "Upsample"
      Ports		      [1, 1]
      Position		      [1110, 223, 1145, 257]
      SourceBlock	      "dspsigops/Upsample"
      SourceType	      "Upsample"
      N			      "5"
      phase		      "0"
      ic		      "0"
      mode		      "Maintain input frame size"
    }
    Line {
      SrcBlock		      "Delay"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Data Type Conversion1"
      SrcPort		      1
      Points		      [0, 0; 40, 0]
      Branch {
	DstBlock		"Sum"
	DstPort			2
      }
      Branch {
	DstBlock		"Delay"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Delay1"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum"
      SrcPort		      1
      Points		      [0, 0; 10, 0]
      Branch {
	DstBlock		"Delay1"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum1"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Delay2"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum1"
      SrcPort		      1
      Points		      [0, 0; 10, 0]
      Branch {
	DstBlock		"Delay2"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum2"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Delay3"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum2"
      SrcPort		      1
      Points		      [0, 0; 10, 0]
      Branch {
	DstBlock		"Delay3"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum3"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Delay4"
      SrcPort		      1
      Points		      [5, 0]
      DstBlock		      "Sum4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum3"
      SrcPort		      1
      Points		      [0, 0; 15, 0]
      Branch {
	DstBlock		"Delay4"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum4"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Sum4"
      SrcPort		      1
      Points		      [15, 0]
      Branch {
	DstBlock		"Upsample"
	DstPort			1
      }
      Branch {
	Points			[0, -100]
	DstBlock		"Signal To\nWorkspace"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Upsample"
      SrcPort		      1
      Points		      [5, 0; 0, 220]
      DstBlock		      "Sum5"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Sum5"
      SrcPort		      1
      Points		      [0, 0; -65, 0]
      Branch {
	DstBlock		"Delay5"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum6"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Sum6"
      SrcPort		      1
      Points		      [0, 0; -70, 0]
      Branch {
	Points			[0, -65]
	DstBlock		"Delay6"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum7"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Sum7"
      SrcPort		      1
      Points		      [0, 0; -65, 0]
      Branch {
	DstBlock		"Delay7"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum8"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Sum8"
      SrcPort		      1
      Points		      [0, 0; -70, 0]
      Branch {
	DstBlock		"Delay8"
	DstPort			1
      }
      Branch {
	DstBlock		"Sum9"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Sum9"
      SrcPort		      1
      Points		      [0, 0; -70, 0]
      Branch {
	DstBlock		"Delay9"
	DstPort			1
      }
      Branch {
	Points			[0, 80]
	DstBlock		"Signal To\nWorkspace1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Delay5"
      SrcPort		      1
      Points		      [5, 0]
      DstBlock		      "Sum5"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay6"
      SrcPort		      1
      Points		      [5, 0]
      DstBlock		      "Sum6"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay7"
      SrcPort		      1
      Points		      [5, 0]
      DstBlock		      "Sum7"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay8"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum8"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay9"
      SrcPort		      1
      Points		      [10, 0]
      DstBlock		      "Sum9"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Random Integer\nGenerator"
      SrcPort		      1
      DstBlock		      "M-PSK\nModulator\nBaseband"
      DstPort		      1
    }
    Line {
      SrcBlock		      "M-PSK\nModulator\nBaseband"
      SrcPort		      1
      DstBlock		      "Raised Cosine\nTransmit Filter"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Raised Cosine\nTransmit Filter"
      SrcPort		      1
      DstBlock		      "Data Type Conversion1"
      DstPort		      1
    }
  }
}
MatData {
  NumRecords		  1
  DataRecord {
    Tag			    DataTag0
    Data		    "  %)30     .    P     8    (     0         %    "
"\"     $    \"     0         .    2     8    (    !          %    \"     $   "
" 4     0         0    %    %)A:7-E9$-O<VEN949I;'1E<E1X      X   !     !@    @"
"    $          4    (     0    H    !         !     *    8V]M;61I86QO9P      "
"  "
  }
}