📄 dk3200_3.frp
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PSDsoft Express Version 7.70
Output of PSD Fitter
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PROJECT : dk3200_3 DATE : 11/11/2002
DEVICE : uPSD3234A TIME : 10:24:29
FIT OPTION : Keep Current
DESCRIPTION: Using I2C IP to run a Real Time Clock
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==== Pin Layout for U (80-Pin TQFP) Package Type ====
-----------------------------
| |
|1 ] pd2 adio4 [41| Address Bus A4/Data Port D4, a4
|2 ] p3_3 p3_5 [42|
|3 ] pd1 adio5 [43| Address Bus A5/Data Port D5, a5
ale |4 ] pd0 p3_6 [44|
|5 ] pc7 adio6 [45| Address Bus A6/Data Port D6, a6
tdo, TDO |6 ] pc6/TDO p3_7 [46|
tdi, TDI |7 ] pc5/TDI adio7 [47| Address Bus A7/Data Port D7, a7
USB_minus |8 ] USBm Xtal1 [48| Xtal1
_terr, TERR |9 ] pc4/TERR Xtal2 [49| Xtal2
USB_plus |10] USBp VCC [50|
|11] N/C adio8 [51| Address Bus A8, a8
|12] VCC p1_0 [52|
|13] GND adio9 [53| Address Bus A9, a9
tstat, TSTAT |14] pc3/TSTAT p1_1 [54|
vstby |15] pc2 adio10 [55| Address Bus A10, a10
tck, TCK |16] pc1/TCK p1_2 [56|
|17] N/C adio11 [57| Address Bus A11, a11
p4_7 |18] p4_7 p1_3 [58|
|19] p4_6 p1_4 [59|
tms, TMS |20] pc0/TMS p1_5 [60|
pa7 ,Peripheral I/O Mode |21] pa7 p1_6 [61|
pa6 ,Peripheral I/O Mode |22] pa6 cntl1 [62| _rd
|23] p4_5 cntl2 [63| _psen
pa5 ,Peripheral I/O Mode |24] pa5 p1_7 [64|
|25] p4_4 cntl0 [65| _wr
pa4 ,Peripheral I/O Mode |26] pa4 pb7 [66| lcd_e
|27] p4_3 pb6 [67| lcd_rw
pa3 ,Peripheral I/O Mode |28] pa3 Reset_In [68| Reset_In
|29] GND GND [69|
|30] p4_2 Vref [70| VREF
|31] p4_1 N/C [71|
pa2 ,Peripheral I/O Mode |32] pa2 pb5 [72| lcd_rs
|33] p4_0 pb4 [73|
pa1 ,Peripheral I/O Mode |34] pa1 pb3 [74| sw2
pa0 ,Peripheral I/O Mode |35] pa0 p3_0 [75|
a0, Address Bus A0/Data Port D0 |36] adio0 pb2 [76| sw1
a1, Address Bus A1/Data Port D1 |37] adio1 p3_1 [77|
a2, Address Bus A2/Data Port D2 |38] adio2 pb1 [78| led2
a3, Address Bus A3/Data Port D3 |39] adio3 p3_2 [79|
|40] p3_4 pb0 [80| led1
| |
-----------------------------
==== Global Configuration ====
Data Bus : 8-Bit
Address/Data Mode : Multiplexed
ALE/AS Signal : Active High
Control Signals : /WR, /RD, /PSEN
Main PSD flash memory will reside in this space at power-up : Data space
Secondary PSD flash memory will reside in this space at power-up : Program space
Enable Chip-Select Input(/CSI) : OFF
Standby Voltage Input (PC2) : ON
Standby-on Indicator (PC4) : OFF
RDY/Busy function (PC3) : OFF
Load Micro-Cell on : edge
Security Protection : OFF
==== DataBus_IMC access information ====
CSIOP
Location Address Offset Register Name Signals
--------------------------------------------------------
===== Resource Usage Summary =====
Total Product Terms Used: 13
Device Resources used / total
------------------------------------------------
Port A: (pins 35 34 32 28 26 24 22 21)
I/O Pins : 8 / 8
GP I/O or Address Out : 0
Peripheral I/O : 8
Logic Inputs : 0
Address Latch Inputs : 0
PT Dependent Latch Inputs : 0
PT Dependent Register Inputs : 0
Combinatorial Outputs : 0
Registered Outputs : 0
Other Information
Microcells : 0 / 8
Micro-Cells AB :
Buried Microcells : 0
Output Microcells : 0
Product Terms : 0 / 24
Control Product Terms : 0 / 34
Port B: (pins 80 78 76 74 73 72 67 66)
I/O Pins : 7 / 8
GP I/O or Address Out : 4
Logic Inputs : 0
Address Latch Inputs : 0
PT Dependent Latch Inputs : 0
PT Dependent Register Inputs : 0
Combinatorial Outputs : 3
Registered Outputs : 0
Other Information
Microcells : 3 / 8
Micro-Cells AB :
Buried Microcells : 0
Output Microcells : 0
Micro-Cells BC :
Buried Microcells : 0
Output Microcells : 3
Product Terms : 4 / 27
Control Product Terms : 3 / 34
Port C: (pins 20 16 15 14 9 7 6 5)
I/O Pins : 7 / 8
GP I/O or Address Out : 0
Logic Inputs : 0
Address Latch Inputs : 0
PT Dependent Latch Inputs : 0
PT Dependent Register Inputs : 0
JTAG signals : 6
Standby Voltage Input : 1
Rdy/Bsy signal : 0
Standby On Indicator : 0
Combinatorial Outputs : 0
Registered Outputs : 0
Other Information
Microcells : 3 / 8
Micro-Cells BC :
Buried Microcells : 3
Output Microcells : 0
Product Terms : 4 / 32
Control Product Terms : 0 / 34
Port D: (pins 4 3 1)
I/O Pins : 1 / 3
GP I/O or Address Out : 0
Logic Inputs : 0
Chip-Select Input : 0
Clock Input : 0
Control Signal Input : 1
Fast Decoding Outputs : 0
Other Information
Product Terms : 0 / 3
Control Product Terms : 0 / 3
==== OMC Resource Assignment ====
Resources PT User
Used Allocation Name
---------------------------------------------------------
Micro-Cell AB :
Micro-Cell BC :
Micro-Cells 5 - lcd_rs (mcellbc5) => Combinatorial
Micro-Cells 6 - lcd_rw (mcellbc6) => Combinatorial
Micro-Cells 7 - lcd_e (mcellbc7) => Combinatorial
External Chip Select :
========= Equations =========
DPLD EQUATIONS :
=======================
fs0 = !pdn & a15;
csboot0 = !pdn & !a15 & !a14 & !a13;
csboot1 = !pdn & !a15 & !a14 & a13;
csiop = !pdn & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & a9 & !a8;
rs0 = !pdn & !a15 & !a14 & a13;
psel0 = !pdn & _psen & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & a9 & a8;
PORTA EQUATIONS :
=======================
PORTB EQUATIONS :
=======================
lcd_rs = a1;
lcd_rs.OE = 1;
lcd_rw = a0;
lcd_rw.OE = 1;
lcd_e = (!_rd & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & a9 & a8)
# (!_wr & !a15 & !a14 & !a13 & !a12 & !a11 & !a10 & a9 & a8);
lcd_e.OE = 1;
PORTC EQUATIONS :
=======================
PORTD EQUATIONS :
=======================
--- End ---
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