fig33_33.sp

含有LIBRARY MODELS

* Figure 33.33 CMOS: Mixed-Signal Circuit Design *

Vdd	Vdd 0 DC 1.5 
Vin Vin 0 DC 0 pulse 0 1.5 0 .1n .1n 4.9n 10n

X1 Vin phi2d norout1 Vdd nor
X2 Vin Vinb Vdd invert
X3 Vinb phi1d norout2 Vdd nor
X4 norout1 phi1 Vdd clkboot
X5 phi1 phi1d Vdd clkboot
X6 norout2 phi2 Vdd clkboot
X7 phi2 phi2d Vdd clkboot

*add load capacitors
Cl1 phi1 0 200f
Cl2 phi1d 0 200f
Cl3 phi2 0 200f
Cl4 phi2d 0 200f

.tran .02n 40n 20n .02n 
.option scale=150n post

.subckt invert Vin Vout Vdd
M1 Vout Vin 0 0 NMOS  L=1 W=50 PD=100
M2 Vout Vin Vdd Vdd PMOS  L=1 W=100 PD=200
.ends

.subckt nor a b anorb Vdd
M1 anorb a 0 0 NMOS L=1 W=50 PD=100
M2 anorb b 0 0 NMOS L=1 W=50 PD=100
M3 anorb a 1 Vdd PMOS L=1 W=100 PD=200
M4 1 b Vdd Vdd PMOS L=1 W=100 PD=200
.ends

.subckt clkboot Vin Vout Vdd
M1 Vdd Vop Vb 0 NMOS L=1 W=20 PD=40
M2 Vdd Vb Vop 0 NMOS L=1 W=100 PD=200
M3 Vout Vi1 0 0 NMOS L=1 W=100 PD=200
M4 Vout Vi1 Vop Vop PMOS L=1 W=100 PD=200
C1 Vb Vi1 100f
C2 Vop Vi2 1000f
X1 Vin Vi1 Vdd invert
X2 Vi1 Vi2 Vdd invert
.ends

.MODEL nmos nmos  level=1 VTO=0.4 GAMMA=0.71 PHI=0.97 KP=453E-6
+ CJ=1.0E-3 CJSW=2.0E-10 MJ=0.5 MJSW=0.3 PB=0.9 tox=40e-10

.MODEL pmos pmos  level=1 VTO=-0.4 GAMMA=0.69 PHI=0.87 KP=92.15E-6 
+ CJ=1.3E-3 CJSW=2.5E-10 MJ=0.5 MJSW=0.35 PB=0.9 tox=40e-10

*** SPICE Models

*** Models created by Daniel Foty.
*** (c) 2001, Gilgamesh Associates and EPFL - All rights reserved.
*** These models are provided without warranty or support.
*** These models represent a completely fictitious 0.15um process, and do
***   NOT correspond to any real silicon process.  They are provided expressly for
***   use in the examples provided in this text, and should not be used for any 
***   real silicon product design.

*** NMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE, 
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*---------------
.MODEL nmos1 nmos
+ LEVEL=55

*** Setup Parameters
+ UPDATE=2.6

*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6

*** Intrinsic Model Parameters
+ VTO=0.4 GAMMA=0.71 PHI=0.97 KP=453E-6
+ E0=88.0E6 UCRIT=4.0E6 
+ DL=-0.05E-6 DW=-0.02E-6
+ LAMBDA = 0.30 LETA=0.28 WETA=0
+ Q0=280E-6 LK=0.5E-6

*** Substrate Current Parameters
+ IBN=1.0 IBA=200E6 IBB=350E6

*** Intrinsic Model Temperature Parameters
+ TNOM=27.0 TCV=1.5E-3 BEX=-1.5 UCEX=1.7 IBBT=0

*** 1/f Noise Model Parameters
+ KF=1E-27 AF=1

*** Series Resistance and Area Calculation Parameters
+ HDIF=0.24e-6 ACM=3 RSH=5.0 RS=1250.526
+ RD=1250.526 LDIF=0.07e-6

*** Junction Current Parameters
+ JS=1.0E-6 JSW=5.0E-11 XTI=0 N=1.5

*** Junction Capacitances Parameters
+ CJ=1.0E-3 CJSW=2.0E-10 CJGATE=5.0E-10
+ MJ=0.5 MJSW=0.3 PB=0.9 PBSW=0.9 FC=0.5

*** Gate Overlap Capacitances
+ CGSO=3.0E-10 CGDO=3.0E-10 CGBO=3.0E-11

*** PMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE, 
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*---------------
.MODEL pmos1 pmos
+ LEVEL  = 55

*** Setup Parameters
+ UPDATE = 2.6

*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6

*** Intrinsic Model Parameters
+ VTO=-0.4 GAMMA=0.69 PHI=0.87 KP=92.15E-6
+ E0=51.0E6 UCRIT=18.0E6
+ DL=-0.05E-6 DW=-0.03E-6
+ LAMBDA=1.1 LETA=0.45 WETA=0
+ Q0=200E-6 LK=0.6E-6

*** Substrate Current Parameters 
+ IBN=1.0 IBA=0.0 IBB=300E6 

*** Intrinsic Model Temperature Parameters 
+ TNOM=25.0 TCV=-1.4E-3 BEX=-1.4 UCEX=2.0 IBBT=0.0 

*** 1/f Noise Model Parameters 
+ KF=1.0E-28 AF=1 

*** Series Resistance and Area Calculation Parameters   
+ HDIF=0.24E-6 ACM=3 RSH=5.0 RS=3145.263
+ RD=3145.263 LDIF=0.07e-6

*** Junction Current Parameters   
+ JS=1.0E-7 JSW=5.0E-12 XTI=0 N=1.8 

*** Junction Capacitances Parameters 
+ CJ=1.3E-3 CJSW=2.5E-10 CJGATE=5.5E-10 
+ MJ=0.5 MJSW=0.35 PB=0.9 PBSW=0.9 FC=0.5 

*** Gate Overlap Capacitances 
+ CGSO=3.2E-10 CGDO=3.2E-10 CGBO=3.0E-11

.end