setup-tx39-jmr3904.html
来自「有关ecos2。0介绍了实时嵌入式的结构以及线程调度的实现和内存的管理等」· HTML 代码 · 共 193 行
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<!-- Copyright (C) 2003 Red Hat, Inc. --><!-- This material may be distributed only subject to the terms --><!-- and conditions set forth in the Open Publication License, v1.0 --><!-- or later (the latest version is presently available at --><!-- http://www.opencontent.org/openpub/). --><!-- Distribution of the work or derivative of the work in any --><!-- standard (paper) book form is prohibited unless prior --><!-- permission is obtained from the copyright holder. --><HTML><HEAD><TITLE>TX39 Hardware Setup</TITLE><meta name="MSSmartTagsPreventParsing" content="TRUE"><METANAME="GENERATOR"CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+"><LINKREL="HOME"TITLE="eCos User Guide"HREF="ecos-user-guide.html"><LINKREL="UP"TITLE="Target Setup"HREF="appendix-target-setup.html"><LINKREL="PREVIOUS"TITLE="AM33 STB Hardware Setup"HREF="setup-am33-stb.html"><LINKREL="NEXT"TITLE="TX39 Architectural Simulator Setup"HREF="setup-tx39-sim.html"></HEAD><BODYCLASS="SECT1"BGCOLOR="#FFFFFF"TEXT="#000000"LINK="#0000FF"VLINK="#840084"ALINK="#0000FF"><DIVCLASS="NAVHEADER"><TABLESUMMARY="Header navigation table"WIDTH="100%"BORDER="0"CELLPADDING="0"CELLSPACING="0"><TR><THCOLSPAN="3"ALIGN="center">eCos User Guide</TH></TR><TR><TDWIDTH="10%"ALIGN="left"VALIGN="bottom"><AHREF="setup-am33-stb.html"ACCESSKEY="P">Prev</A></TD><TDWIDTH="80%"ALIGN="center"VALIGN="bottom">Appendix A. Target Setup</TD><TDWIDTH="10%"ALIGN="right"VALIGN="bottom"><AHREF="setup-tx39-sim.html"ACCESSKEY="N">Next</A></TD></TR></TABLE><HRALIGN="LEFT"WIDTH="100%"></DIV><DIVCLASS="SECT1"><H1CLASS="SECT1"><ANAME="SETUP-TX39-JMR3904">TX39 Hardware Setup</H1><P>The eCos Developer’s Kit package comes with a pairof ROMs that provide GDB support forthe Toshiba JMR-TX3904 RISC processor reference board by way of CygMon. </P><P>Images of these ROMs are also provided at <TTCLASS="FILENAME">BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin</TT> and <TTCLASS="FILENAME">BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin</TT> for50 MHz and 66 MHz boards respectively. The ROMs are installed tosockets IC6 and IC7 on the memory daughterboard according to theirlabels. Attention should be paid to the correct orientation of theseROMs during installation.</P><P>The GDB stub allows communication with GDB using the serialport (channel C) at connector PJ1. The communication parametersare fixed at 38400 baud, 8 data bits, no parity bit, and 1 stopbit (8-N-1). No handshaking is employed. Connection to the hostcomputer should be made using an RS232C null modem cable.</P><P>CygMon and eCos currently provide support for a 16Mbyte 60ns72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMsmay require changes in the value stored in the DCCR0 register. Thisvalue may be found near line 211 in <TTCLASS="FILENAME">hal/mips/arch/<TTCLASS="REPLACEABLE"><I><version></I></TT>/src/vectors.S</TT>in eCos, and near line 99 in <TTCLASS="FILENAME">libstub/mips/tx39jmr/tx39jmr-power.S</TT> inCygMon. eCos does not currently use the DRAM for any purpose itself,so it is entirely available for application use.</P></DIV><DIVCLASS="NAVFOOTER"><HRALIGN="LEFT"WIDTH="100%"><TABLESUMMARY="Footer navigation table"WIDTH="100%"BORDER="0"CELLPADDING="0"CELLSPACING="0"><TR><TDWIDTH="33%"ALIGN="left"VALIGN="top"><AHREF="setup-am33-stb.html"ACCESSKEY="P">Prev</A></TD><TDWIDTH="34%"ALIGN="center"VALIGN="top"><AHREF="ecos-user-guide.html"ACCESSKEY="H">Home</A></TD><TDWIDTH="33%"ALIGN="right"VALIGN="top"><AHREF="setup-tx39-sim.html"ACCESSKEY="N">Next</A></TD></TR><TR><TDWIDTH="33%"ALIGN="left"VALIGN="top">AM33 STB Hardware Setup</TD><TDWIDTH="34%"ALIGN="center"VALIGN="top"><AHREF="appendix-target-setup.html"ACCESSKEY="U">Up</A></TD><TDWIDTH="33%"ALIGN="right"VALIGN="top">TX39 Architectural Simulator Setup</TD></TR></TABLE></DIV></BODY></HTML>⌨️ 快捷键说明
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