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📄 m9s12xf512.c

📁 基于freescale MC9S12XF512 MCU
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/*******************************************************************************/
/**
Copyright (c) 2007 Freescale Semiconductor
Freescale Confidential Proprietary
\file       M9S12XF512.c
\brief      S12XF512 register definitions 
\author     Freescale Semiconductor
\author     Guadalajara Applications Laboratory RTAC Americas
\author     Jaime Orozco
\version    1.0
\date       March/09/2007
\warning    This preliminary release does not include all S12XF512 peripheral 
            modules, see M9S12XF512.h to verify the modules currently defined.
*/
/*******************************************************************************/
/*                                                                             */
/* All software, source code, included documentation, and any implied know-how */
/* are property of Freescale Semiconductor and therefore considered            */ 
/* CONFIDENTIAL INFORMATION.                                                   */
/*                                                                             */
/* This confidential information is disclosed FOR DEMONSTRATION PURPOSES ONLY. */
/*                                                                             */
/* All Confidential Information remains the property of Freescale Semiconductor*/
/* and will not be copied or reproduced without the express written permission */
/* of the Discloser, except for copies that are absolutely necessary in order  */
/* to fulfill the Purpose.                                                     */
/*                                                                             */
/* Services performed by FREESCALE in this matter are performed AS IS and      */
/* without any warranty. CUSTOMER retains the final decision relative to the   */
/* total design and functionality of the end product.                          */
/*                                                                             */
/* FREESCALE neither guarantees nor will be held liable by CUSTOMER for the    */
/* success of this project.                                                    */
/*                                                                             */
/* FREESCALE disclaims all warranties, express, implied or statutory including,*/
/* but not limited to, implied warranty of merchantability or fitness for a    */
/* particular purpose on any hardware, software or advise supplied to the      */
/* project by FREESCALE, and or any product resulting from FREESCALE services. */
/*                                                                             */
/* In no event shall FREESCALE be liable for incidental or consequential       */
/* damages arising out of this agreement. CUSTOMER agrees to hold FREESCALE    */
/* harmless against any and all claims demands or actions by anyone on account */
/* of any damage,or injury, whether commercial, contractual, or tortuous,      */
/* rising directly or indirectly as a result of the advise or assistance       */
/* supplied CUSTOMER in connection with product, services or goods supplied    */
/* under this Agreement.                                                       */
/*                                                                             */
/*******************************************************************************/

/** S12X derivative information */
#include "M9S12XF512.h"


/*  8-BIT REGISTERS  */
volatile PORTESTR _PORTE;              /* Port E Register; 0x00000008 */
volatile DDRESTR _DDRE;                /* Port E Data Direction Register; 0x00000009 */
volatile MMCCTL0STR _MMCCTL0;          /* S12X_MMC Control Register 0; 0x0000000A */
volatile MODESTR _MODE;                /* Mode Register; 0x0000000B */
volatile PUCRSTR _PUCR;                /* Pull-Up Control Register; 0x0000000C */
volatile RDRIVSTR _RDRIV;              /* Reduced Drive of I/O Lines; 0x0000000D */

/* volatile EBICTL0STR _EBICTL0;          External Bus Interface Control Register 0; 0x0000000E */
/* volatile EBICTL1STR _EBICTL1;          External Bus Interface Control Register 1; 0x0000000F */

volatile GPAGESTR _GPAGE;              /* Global Page Index Register; 0x00000010 */
volatile DIRECTSTR _DIRECT;            /* Direct Page Register; 0x00000011 */
volatile MMCCTL1STR _MMCCTL1;          /* S12X_MMC Control Register 1; 0x00000013 */
volatile PPAGESTR _PPAGE;              /* Program Page Index Register; 0x00000015 */
volatile RPAGESTR _RPAGE;              /* RAM Page Index Register; 0x00000016 */
volatile EPAGESTR _EPAGE;              /* EEPROM Page Index Register; 0x00000017 */
volatile RAMFRLSTR _RAMFRL;            /* RAM FLEXRAY Lower Boundary Register; 0x00000018 */
volatile RAMFRUSTR _RAMFRU;            /* RAM FLEXRAY Upper Boundary Register; 0x00000019 */
/* volatile ECLKCTLSTR _ECLKCTL;          ECLK Control Register; 0x0000001C */
volatile IRQCRSTR _IRQCR;              /* Interrupt Control Register; 0x0000001E */

/* PENDING: DBG module */
/* volatile DBGC1STR _DBGC1;              Debug Control Register 1; 0x00000020 */
/* volatile DBGSRSTR _DBGSR;              Debug Status Register; 0x00000021 */
/* volatile DBGTCRSTR _DBGTCR;            Debug Trace Control Register; 0x00000022 */
/* volatile DBGC2STR _DBGC2;              Debug Control Register 2; 0x00000023 */
/* volatile DBGCNTSTR _DBGCNT;            Debug Count Register; 0x00000026 */
/* volatile DBGSCRXSTR _DBGSCRX;          Debug State Control Register 0; 0x00000027 */
/* volatile DBGXCTLSTR _DBGXCTL;          Debug Comparator Control Register; 0x00000028 */
/* volatile DBGXAHSTR _DBGXAH;            Debug Comparator Address High Register; 0x00000029 */
/* volatile DBGXAMSTR _DBGXAM;            Debug Comparator Address Mid Register; 0x0000002A */
/* volatile DBGXALSTR _DBGXAL;            Debug Comparator Address Low Register; 0x0000002B */
/* volatile DBGXDHSTR _DBGXDH;            Debug Comparator Data High Register; 0x0000002C */
/* volatile DBGXDLSTR _DBGXDL;            Debug Comparator Data Low Register; 0x0000002D */
/* volatile DBGXDHMSTR _DBGXDHM;          Debug Comparator Data High Mask Register; 0x0000002E */
/* volatile DBGXDLMSTR _DBGXDLM;          Debug Comparator Data Low Mask Register; 0x0000002F */

volatile PPAGESTR _PPAGE;              /* Program Page Index Register; 0x00000030 */
volatile PORTKSTR _PORTK;              /* Port K Data Register; 0x00000032 */
volatile DDRKSTR _DDRK;                /* Port K Data Direction Register; 0x00000033 */


/* Clock and Reset Generator Module */
volatile SYNRSTR _SYNR;                /* CRG Synthesizer Register; 0x00000034 */
volatile REFDVSTR _REFDV;              /* CRG Reference Divider Register; 0x00000035 */
volatile CRGFLGSTR _CRGFLG;            /* CRG Flags Register; 0x00000037 */
volatile CRGINTSTR _CRGINT;            /* CRG Interrupt Enable Register; 0x00000038 */
volatile CLKSELSTR _CLKSEL;            /* CRG Clock Select Register; 0x00000039 */
volatile PLLCTLSTR _PLLCTL;            /* CRG PLL Control Register; 0x0000003A */
volatile RTICTLSTR _RTICTL;            /* CRG RTI Control Register; 0x0000003B */
volatile COPCTLSTR _COPCTL;            /* CRG COP Control Register; 0x0000003C */
volatile ARMCOPSTR _ARMCOP;            /* CRG COP Timer Arm/Reset Register; 0x0000003F */


/*  Enhanced Capture Timer Module */
volatile TIOSSTR _TIOS;                /* Timer Input Capture/Output Compare Select; 0x00000040 */
volatile CFORCSTR _CFORC;              /* Timer Compare Force Register; 0x00000041 */
volatile OC7MSTR _OC7M;                /* Output Compare 7 Mask Register; 0x00000042 */
volatile OC7DSTR _OC7D;                /* Output Compare 7 Data Register; 0x00000043 */
volatile TSCR1STR _TSCR1;              /* Timer System Control Register1; 0x00000046 */
volatile TTOVSTR _TTOV;                /* Timer Toggle On Overflow Register; 0x00000047 */
volatile TCTL1STR _TCTL1;              /* Timer Control Register 1; 0x00000048 */
volatile TCTL2STR _TCTL2;              /* Timer Control Register 2; 0x00000049 */
volatile TCTL3STR _TCTL3;              /* Timer Control Register 3; 0x0000004A */
volatile TCTL4STR _TCTL4;              /* Timer Control Register 4; 0x0000004B */
volatile TIESTR _TIE;                  /* Timer Interrupt Enable Register; 0x0000004C */
volatile TSCR2STR _TSCR2;              /* Timer System Control Register 2; 0x0000004D */
volatile TFLG1STR _TFLG1;              /* Main Timer Interrupt Flag 1; 0x0000004E */
volatile TFLG2STR _TFLG2;              /* Main Timer Interrupt Flag 2; 0x0000004F */
volatile PACTLSTR _PACTL;              /* 16-Bit Pulse Accumulator A Control Register; 0x00000060 */
volatile PAFLGSTR _PAFLG;              /* Pulse Accumulator A Flag Register; 0x00000061 */
volatile MCCTLSTR _MCCTL;              /* Modulus Down Counter underflow; 0x00000066 */
volatile MCFLGSTR _MCFLG;              /* 16-Bit Modulus Down Counter Flag Register; 0x00000067 */
volatile ICPARSTR _ICPAR;              /* Input Control Pulse Accumulator Register; 0x00000068 */
volatile DLYCTSTR _DLYCT;              /* Delay Counter Control Register; 0x00000069 */
volatile ICOVWSTR _ICOVW;              /* Input Control Overwrite Register; 0x0000006A */
volatile ICSYSSTR _ICSYS;              /* Input Control System Control Register; 0x0000006B */
/* volatile PTPSRSTR _PTPSR;              Precision Timer Prescaler Select; 0x0000006E */
/* volatile PTMCPSRSTR _PTMCPSR;          Precision Timer Modulus Counter Prescaler Select Register; 0x0000006F */
volatile PBCTLSTR _PBCTL;              /* 16-Bit Pulse Accumulator B Control Register; 0x00000070 */
volatile PBFLGSTR _PBFLG;              /* Pulse Accumulator B Flag Register; 0x00000071 */

/* ATD Module 0 - 16 Channel ATD */
/* volatile ATD1STAT0STR _ATD1STAT0;      ATD 1 Status Register 0; 0x00000086 */
/* volatile ATD1STAT2STR _ATD1STAT2;      ATD 1 Status Register 2; 0x0000008A */
/* volatile ATD1STAT1STR _ATD1STAT1;      ATD 1 Status Register 1; 0x0000008B */

/* PENDING: SCI Module 0 */
/* volatile SCI0ACR2STR _SCI0ACR2;        SCI 0 Alternative Control Register 2; 0x000000CA */
/* volatile SCI0CR2STR _SCI0CR2;          SCI 0 Control Register 2; 0x000000CB */
/* volatile SCI0SR1STR _SCI0SR1;          SCI 0 Status Register 1; 0x000000CC */
/* volatile SCI0SR2STR _SCI0SR2;          SCI 0 Status Register 2; 0x000000CD */
/* volatile SCI0DRHSTR _SCI0DRH;          SCI 0 Data Register High; 0x000000CE */
/* volatile SCI0DRLSTR _SCI0DRL;          SCI 0 Data Register Low; 0x000000CF */

/* PENDING: SCI Module 1 */
/* volatile SCI1ACR2STR _SCI1ACR2;        SCI 1 Alternative Control Register 2; 0x000000D2 */
/* volatile SCI1CR2STR _SCI1CR2;          SCI 1 Control Register 2; 0x000000D3 */
/* volatile SCI1SR1STR _SCI1SR1;          SCI 1 Status Register 1; 0x000000D4 */
/* volatile SCI1SR2STR _SCI1SR2;          SCI 1 Status Register 2; 0x000000D5 */
/* volatile SCI1DRHSTR _SCI1DRH;          SCI 1 Data Register High; 0x000000D6 */
/* volatile SCI1DRLSTR _SCI1DRL;          SCI 1 Data Register Low; 0x000000D7 */
 
/* SPI Module 0 */
volatile SPI0CR1STR _SPI0CR1;          /* SPI 0 Control Register; 0x000000D8 */
volatile SPI0CR2STR _SPI0CR2;          /* SPI 0 Control Register 2; 0x000000D9 */
volatile SPI0BRSTR _SPI0BR;            /* SPI 0 Baud Rate Register; 0x000000DA */
volatile SPI0SRSTR _SPI0SR;            /* SPI 0 Status Register; 0x000000DB */
volatile SPI0DRSTR _SPI0DR;            /* SPI 0 Data Register; 0x000000DD */

/* SPI Module 1 */
volatile SPI1CR1STR _SPI1CR1;          /* SPI 1 Control Register; 0x000000F0 */
volatile SPI1CR2STR _SPI1CR2;          /* SPI 1 Control Register 2; 0x000000F1 */
volatile SPI1BRSTR _SPI1BR;            /* SPI 1 Baud Rate Register; 0x000000F2 */
volatile SPI1SRSTR _SPI1SR;            /* SPI 1 Status Register; 0x000000F3 */
volatile SPI1DRSTR _SPI1DR;            /* SPI 1 Data Register; 0x000000F5 */


/* PENDING: NVM Control Registers */
/* volatile FCLKDIVSTR _FCLKDIV;           Flash Clock Divider Register; 0x00000100 */
/* volatile FSECSTR _FSEC;                Flash Security Register; 0x00000101 */
/* volatile FTSTMODSTR _FTSTMOD;          Flash Test Mode Register; 0x00000102 */
/* volatile FCNFGSTR _FCNFG;              Flash Configuration Register; 0x00000103 */
/* volatile FPROTSTR _FPROT;              Flash Protection Register; 0x00000104 */
/* volatile FSTATSTR _FSTAT;              Flash Status Register; 0x00000105 */
/* volatile FCMDSTR _FCMD;                Flash Command Buffer and Register; 0x00000106 */
/* volatile FADDRHISTR _FADDRHI;          Flash Address High Register; 0x00000108 */

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