📄 fr_unified.c
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/******************************************************************************
*
* Freescale Semiconductor Inc.
* (c) Copyright 2004-2005 Freescale Semiconductor, Inc.
* (c) Copyright 2001-2004 Motorola, Inc.
* ALL RIGHTS RESERVED.
*
***************************************************************************//*!
*
* @file Fr_UNIFIED.c
*
* @author R62779
*
* @version 1.0.74.0
*
* @date Apr-23-2007
*
* @brief FlexRay UNIFIED Driver implementation
*
******************************************************************************/
/******************************************************************************
* Includes
******************************************************************************/
#include "Fr_UNIFIED.h"
#include "Fr_UNIFIED_cfg.h"
/******************************************************************************
* Constants
******************************************************************************/
/******************************************************************************
* Local variables
******************************************************************************/
// This variable is used for base address of the FlexRay module
volatile uint16 * FR_REG_FAR Fr_CC_reg_ptr;
volatile uint32 * Fr_CC_reg_32_ptr; // 32-bit access to the registers, for the MPC5567
// This variable is used for determine which type of FlexRay hardware is used
static Fr_connected_HW_type Fr_connected_HW;
/* This internal array contains message buffer configuration information (except shadow message buffers and FIFO storage).*/
#ifdef FR_NUMBER_TXRX_MB
/* The FR_NUMBER_TXRX_MB parameter is defined in the Fr_UNIFIED_cfg.h file
- memory consumption optimization is applied */
// The UNIFIED Driver allocates following array with limited number of elements
// - the number is given by host in the Fr_UNIFIED_cfg.h file
static Fr_MB_information_internal_type Fr_MB_information_internal[FR_NUMBER_TXRX_MB + 1];
#else
/* The FR_NUMBER_TXRX_MB parameter is not defined in the Fr_UNIFIED_cfg.h file
- no memory consumption optimization is applied */
// The UNIFIED Driver allocates following array with the maximal number of elements (for maximum number of possible MB)
static Fr_MB_information_internal_type Fr_MB_information_internal[FR_MAX_NUMBER_TXRX_MB];
#endif
/* This internal array contains slot status configuration information */
static Fr_slot_status_internal_type Fr_slot_status_information_internal;
/* This internal structure contains names of callback functions */
static Fr_callback_functions_type Fr_callback_functions;
// Internal pointers to configuration data, they are initialized in the Fr_set_configuration function
static const Fr_HW_config_type *Fr_HW_config_ptr;
static const Fr_low_level_config_type *Fr_low_level_config_ptr;
static const Fr_buffer_info_type *Fr_buffers_config_ptr;
static const uint8 *Fr_buffer_config_set_ptr;
// Internal pointers to configuration data
static const Fr_timer_config_type *Fr_timers_config_ptr;
static const Fr_slot_status_counter_config_type *Fr_slot_status_counter_config_ptr;
static Fr_FIFO_info_type Fr_FIFO_info;
/******************************************************************************
* Global functions
******************************************************************************/
/************************************************************************************
* Function name: Fr_init
* Description: This API call stores the base address of the FlexRay
* module and available memory, configures the channels,
* resets FlexRay CC and forces the CC into FR_POCSTATE_CONFIG state
*
* @author r62779
* @version 9/11/2006
* Function arguments:
* Fr_HW_config_temp_ptr Reference to the hardware configuration
* parameters for the FlexRay driver
* Fr_low_level_config_temp_ptr Reference to the low level
* configuration parameters
*
* Return value:
* FR_SUCCESS API call has been successful
* FR_NOT_SUCCESS Error occured during transition
* into FR_POCSTATE_CONFIG
*************************************************************************************/
Fr_return_type Fr_init(const Fr_HW_config_type *Fr_HW_config_temp_ptr,
const Fr_low_level_config_type *Fr_low_level_config_temp_ptr)
{
volatile uint16 temp_value; // Temporary variable for bit operations
uint8 i = 0; // Temporary counter
// Initialize the base address
Fr_CC_reg_ptr = (volatile uint16 * FR_REG_FAR) Fr_HW_config_temp_ptr->CC_base_address;
// Initilaze connected HW
Fr_connected_HW = Fr_HW_config_temp_ptr->connected_HW;
// Initialize the FlexRay Memory Start address
if((Fr_connected_HW != FR_MFR4300) && (Fr_connected_HW != FR_MFR4310)) // Not necessary for the MFR4300 and MFR4310
{
Fr_CC_reg_ptr[FrSYMBADHR] = (uint16)(Fr_HW_config_temp_ptr->CC_FlexRay_memory_base_address >> 16);
Fr_CC_reg_ptr[FrSYMBADLR] = (uint16)(Fr_HW_config_temp_ptr->CC_FlexRay_memory_base_address & 0xffff);
}
/* Configuration of the SYMATOR register */
// Not implemented for MFR4300, MPC5567 (rev 0), MC9S12XFR128 and MFR4310
if((Fr_connected_HW != FR_MFR4300) && (Fr_connected_HW != FR_MFR4310) && \
(Fr_connected_HW != FR_MPC5567) && (Fr_connected_HW != FR_MC9S12XFR128))
{
if(Fr_HW_config_temp_ptr->timeout != 0) // Stored only if the value is not equal to 0
{
// Store the value of the TIMEOUT bit field in the SYMATOR register
Fr_CC_reg_ptr[FrSYMATOR] = (uint16)(Fr_HW_config_temp_ptr->timeout & 0x1F);
}
}
/* Configuration of the MCR register */
temp_value = 0x0000; // Clear temporary variable
// Configuration of the device operation mode
if(Fr_HW_config_temp_ptr->single_channel_mode == FR_SINGLE_CHANNEL_MODE)
{
temp_value = FrMCR_SCM; // Single chip mode
}
// FlexRay channel configuration, see data sheet for detailed description of the single and dual channel mode
if(Fr_low_level_config_temp_ptr->P_CHANNELS == FR_CHANNEL_AB)
{
temp_value = FrMCR_CHA | FrMCR_CHB; // Dual mode - both ports enabled, single mode - no ports enabled
}
else if(Fr_low_level_config_temp_ptr->P_CHANNELS == FR_CHANNEL_B)
{
// Dual mode - port B enabled, single mode - port A enabled, internal channel A behaves as channel B
temp_value |= FrMCR_CHB;
}
else if(Fr_low_level_config_temp_ptr->P_CHANNELS == FR_CHANNEL_A)
{
// Dual mode - port B enabled, single mode - port A enabled, internal channel A behaves as channel B
temp_value |= FrMCR_CHA;
}
if(Fr_HW_config_temp_ptr->synchronization_filtering_enable)
{
temp_value |= FrMCR_SFFE; // Synchronization frame filter enabled
}
// Not used for the MFR4300 and MFR4310
if(((Fr_connected_HW != FR_MFR4300) && (Fr_connected_HW != FR_MFR4310)) && \
(Fr_HW_config_temp_ptr->clock_source == FR_INTERNAL_SYSTEM_BUS_CLOCK))
{
temp_value |= FrMCR_CLKSEL; // Use internal system bus clock as PE clock source
}
// PRESCALE or BITRATE bit field settings in the MCR register - a little different meaning of these bits
if(Fr_connected_HW != FR_MFR4300) // Not necessary for the MFR4300
{
// The factor by which the clock of the protocol engine will be scale down on required FlexRay bitrate
temp_value |= (uint16)((Fr_HW_config_temp_ptr->prescaler_value & 0x07) << 1);
}
Fr_CC_reg_ptr[FrMCR] = temp_value; // Write to MCR reg. before enabling the FR module
temp_value |= FrMCR_MEN;
Fr_CC_reg_ptr[FrMCR] = temp_value; // Enable FlexRay module
/* Force the FlexRay CC into FR_POCSTATE_CONFIG */
i = 0; // Clear temporary counter
while((i < FR_MAX_WAIT_CYCLES) && (Fr_CC_reg_ptr[FrPOCR] & FrPOCR_BSY)) // Wait till Protocol Command Write is not busy
{
i++; // Increment temporary counter
}
if(i == FR_MAX_WAIT_CYCLES) return FR_NOT_SUCCESS; // Return FR_NOT_SUCCESS in case any error
Fr_CC_reg_ptr[FrPOCR] = (FrPOCR_POCCMD_CONFIG | FrPOCR_WME); // Transition to FR_POCSTATE_CONFIG
i = 0; // Clear temporary counter
while((i < FR_MAX_WAIT_CYCLES) && (Fr_CC_reg_ptr[FrPOCR] & FrPOCR_BSY)) // Wait till Protocol Command Write is not busy
{
i++; // Increment temporary counter
}
if(i == FR_MAX_WAIT_CYCLES) return FR_NOT_SUCCESS; // Return FR_NOT_SUCCESS in case any error
// Wait till FlexRay CC is not in FR_POCSTATE_CONFIG
i = 0; // Clear temporary counter
while((i < FR_MAX_WAIT_CYCLES) && ( (Fr_CC_reg_ptr[FrPSR0] & 0x0700) != FrPSR0_PROTSTATE_CONFIG))
{
i++; // Increment temporary counter
}
if(i == FR_MAX_WAIT_CYCLES) return FR_NOT_SUCCESS; // Return FR_NOT_SUCCESS in case any error
return FR_SUCCESS; // API call has been successful
}
/************************************************************************************
* Function name: Fr_set_configuration
* Description: This API call initializes the FlexRay CC. The following action
* are performed by this function:
* - initialization of the data structures of the FlexRay driver
* - configuration of FlexRay configuration parameters (e.g. cluster configuration)
* - disabling all FlexRay CC interrupts
*
* @author r62779
* @version 9/11/2006
* Function arguments:
* Fr_HW_config_temp_ptr Reference to the hardware configuration
* parameters for the FlexRay driver
* Fr_low_level_config_temp_ptr Reference to the low level
* configuration parameters
*
* Return value:
* None
*************************************************************************************/
void Fr_set_configuration(const Fr_HW_config_type *Fr_HW_config_temp_ptr,
const Fr_low_level_config_type *Fr_low_level_config_temp_ptr)
{
volatile uint16 temp_value_1, temp_value_3; // Temporary variables intended for bit operations
volatile uint32 temp_value_2; // Temporary variable intended for bit operations
uint8 Fr_p; // Temporary counter
// Initialize the base address for the second time - in case that this function is called more than once
// with different configuration
Fr_CC_reg_ptr = (volatile uint16 * FR_REG_FAR) Fr_HW_config_temp_ptr->CC_base_address;
Fr_CC_reg_32_ptr = (volatile uint32 *) Fr_HW_config_temp_ptr->CC_base_address;
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