📄 s12xfpim.h
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#define DDRB_DDRB1 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB1
#define DDRB_DDRB2 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB2
#define DDRB_DDRB3 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB3
#define DDRB_DDRB4 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB4
#define DDRB_DDRB5 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB5
#define DDRB_DDRB6 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB6
#define DDRB_DDRB7 _DDRAB.Overlap_STR.DDRBSTR.Bits.DDRB7
#define DDRB_DDRB0_MASK 1
#define DDRB_DDRB1_MASK 2
#define DDRB_DDRB2_MASK 4
#define DDRB_DDRB3_MASK 8
#define DDRB_DDRB4_MASK 16
#define DDRB_DDRB5_MASK 32
#define DDRB_DDRB6_MASK 64
#define DDRB_DDRB7_MASK 128
} Overlap_STR;
struct {
word DDRB0 :1; /* Data Direction Port B Bit 0 */
word DDRB1 :1; /* Data Direction Port B Bit 1 */
word DDRB2 :1; /* Data Direction Port B Bit 2 */
word DDRB3 :1; /* Data Direction Port B Bit 3 */
word DDRB4 :1; /* Data Direction Port B Bit 4 */
word DDRB5 :1; /* Data Direction Port B Bit 5 */
word DDRB6 :1; /* Data Direction Port B Bit 6 */
word DDRB7 :1; /* Data Direction Port B Bit 7 */
word DDRA0 :1; /* Data Direction Port A Bit 0 */
word DDRA1 :1; /* Data Direction Port A Bit 1 */
word DDRA2 :1; /* Data Direction Port A Bit 2 */
word DDRA3 :1; /* Data Direction Port A Bit 3 */
word DDRA4 :1; /* Data Direction Port A Bit 4 */
word DDRA5 :1; /* Data Direction Port A Bit 5 */
word DDRA6 :1; /* Data Direction Port A Bit 6 */
word DDRA7 :1; /* Data Direction Port A Bit 7 */
} Bits;
struct {
word grpDDRB :8;
word grpDDRA :8;
} MergedBits;
} DDRABSTR;
extern volatile DDRABSTR _DDRAB @(REG_BASE + 0x00000002);
#define DDRAB _DDRAB.Word
#define DDRAB_DDRB0 _DDRAB.Bits.DDRB0
#define DDRAB_DDRB1 _DDRAB.Bits.DDRB1
#define DDRAB_DDRB2 _DDRAB.Bits.DDRB2
#define DDRAB_DDRB3 _DDRAB.Bits.DDRB3
#define DDRAB_DDRB4 _DDRAB.Bits.DDRB4
#define DDRAB_DDRB5 _DDRAB.Bits.DDRB5
#define DDRAB_DDRB6 _DDRAB.Bits.DDRB6
#define DDRAB_DDRB7 _DDRAB.Bits.DDRB7
#define DDRAB_DDRA0 _DDRAB.Bits.DDRA0
#define DDRAB_DDRA1 _DDRAB.Bits.DDRA1
#define DDRAB_DDRA2 _DDRAB.Bits.DDRA2
#define DDRAB_DDRA3 _DDRAB.Bits.DDRA3
#define DDRAB_DDRA4 _DDRAB.Bits.DDRA4
#define DDRAB_DDRA5 _DDRAB.Bits.DDRA5
#define DDRAB_DDRA6 _DDRAB.Bits.DDRA6
#define DDRAB_DDRA7 _DDRAB.Bits.DDRA7
#define DDRAB_DDRB _DDRAB.MergedBits.grpDDRB
#define DDRAB_DDRA _DDRAB.MergedBits.grpDDRA
#define DDRAB_DDRB0_MASK 1
#define DDRAB_DDRB1_MASK 2
#define DDRAB_DDRB2_MASK 4
#define DDRAB_DDRB3_MASK 8
#define DDRAB_DDRB4_MASK 16
#define DDRAB_DDRB5_MASK 32
#define DDRAB_DDRB6_MASK 64
#define DDRAB_DDRB7_MASK 128
#define DDRAB_DDRA0_MASK 256
#define DDRAB_DDRA1_MASK 512
#define DDRAB_DDRA2_MASK 1024
#define DDRAB_DDRA3_MASK 2048
#define DDRAB_DDRA4_MASK 4096
#define DDRAB_DDRA5_MASK 8192
#define DDRAB_DDRA6_MASK 16384
#define DDRAB_DDRA7_MASK 32768
#define DDRAB_DDRB_MASK 255
#define DDRAB_DDRB_BITNUM 0
#define DDRAB_DDRA_MASK 65280
#define DDRAB_DDRA_BITNUM 8
/*** PUCR - Pull-Up Control Register; 0x0000000C ***/
typedef union {
byte Byte;
struct {
byte PUPAE :1; /* Pull-Up Port A Enable */
byte PUPBE :1; /* Pull-Up Port B Enable */
byte PUPCE :1; /* Pull-Up Port C Enable */
byte PUPDE :1; /* Pull-Up Port D Enable */
byte PUPEE :1; /* Pull-Up Port E Enable */
byte :1;
byte BKPUE :1; /* BKGD and VREGEN Pin Pull-up Enable */
byte PUPKE :1; /* Pull-Up Port K Enable */
} Bits;
} PUCRSTR;
extern volatile PUCRSTR _PUCR @(REG_BASE + 0x0000000C);
#define PUCR _PUCR.Byte
#define PUCR_PUPAE _PUCR.Bits.PUPAE
#define PUCR_PUPBE _PUCR.Bits.PUPBE
#define PUCR_PUPCE _PUCR.Bits.PUPCE
#define PUCR_PUPDE _PUCR.Bits.PUPDE
#define PUCR_PUPEE _PUCR.Bits.PUPEE
#define PUCR_BKPUE _PUCR.Bits.BKPUE
#define PUCR_PUPKE _PUCR.Bits.PUPKE
#define PUCR_PUPAE_MASK 1
#define PUCR_PUPBE_MASK 2
#define PUCR_PUPCE_MASK 4
#define PUCR_PUPDE_MASK 8
#define PUCR_PUPEE_MASK 16
#define PUCR_BKPUE_MASK 64
#define PUCR_PUPKE_MASK 128
/*** RDRIV - Reduced Drive of I/O Lines; 0x0000000D ***/
typedef union {
byte Byte;
struct {
byte RDPA :1; /* Reduced Drive of Port A */
byte RDPB :1; /* Reduced Drive of Port B */
byte RDPC :1; /* Reduced Drive of Port C */
byte RDPD :1; /* Reduced Drive of Port D */
byte RDPE :1; /* Reduced Drive of Port E */
byte :1;
byte :1;
byte RDPK :1; /* Reduced Drive of Port K */
} Bits;
struct {
byte grpRDPx :5;
byte :1;
byte :1;
byte :1;
} MergedBits;
} RDRIVSTR;
extern volatile RDRIVSTR _RDRIV @(REG_BASE + 0x0000000D);
#define RDRIV _RDRIV.Byte
#define RDRIV_RDPA _RDRIV.Bits.RDPA
#define RDRIV_RDPB _RDRIV.Bits.RDPB
#define RDRIV_RDPC _RDRIV.Bits.RDPC
#define RDRIV_RDPD _RDRIV.Bits.RDPD
#define RDRIV_RDPE _RDRIV.Bits.RDPE
#define RDRIV_RDPK _RDRIV.Bits.RDPK
#define RDRIV_RDPx _RDRIV.MergedBits.grpRDPx
#define RDRIV_RDPA_MASK 1
#define RDRIV_RDPB_MASK 2
#define RDRIV_RDPC_MASK 4
#define RDRIV_RDPD_MASK 8
#define RDRIV_RDPE_MASK 16
#define RDRIV_RDPK_MASK 128
#define RDRIV_RDPx_MASK 31
#define RDRIV_RDPx_BITNUM 0
/*------------------------------------------------------------------------------*/
/*** PORTCD - Port CD; 0x00000004 ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** PORTC - Port C Register; 0x00000004 ***/
union {
byte Byte;
struct {
byte PC0 :1; /* Port C Bit 0 */
byte PC1 :1; /* Port C Bit 1 */
byte PC2 :1; /* Port C Bit 2 */
byte PC3 :1; /* Port C Bit 3 */
byte PC4 :1; /* Port C Bit 4 */
byte PC5 :1; /* Port C Bit 5 */
byte PC6 :1; /* Port C Bit 6 */
byte PC7 :1; /* Port C Bit 7 */
} Bits;
} PORTCSTR;
#define PORTC _PORTCD.Overlap_STR.PORTCSTR.Byte
#define PORTC_PC0 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC0
#define PORTC_PC1 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC1
#define PORTC_PC2 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC2
#define PORTC_PC3 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC3
#define PORTC_PC4 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC4
#define PORTC_PC5 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC5
#define PORTC_PC6 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC6
#define PORTC_PC7 _PORTCD.Overlap_STR.PORTCSTR.Bits.PC7
#define PORTC_PC0_MASK 1
#define PORTC_PC1_MASK 2
#define PORTC_PC2_MASK 4
#define PORTC_PC3_MASK 8
#define PORTC_PC4_MASK 16
#define PORTC_PC5_MASK 32
#define PORTC_PC6_MASK 64
#define PORTC_PC7_MASK 128
/*** PORTD - Port D Register; 0x00000005 ***/
union {
byte Byte;
struct {
byte PD0 :1; /* Port D Bit 0 */
byte PD1 :1; /* Port D Bit 1 */
byte PD2 :1; /* Port D Bit 2 */
byte PD3 :1; /* Port D Bit 3 */
byte PD4 :1; /* Port D Bit 4 */
byte PD5 :1; /* Port D Bit 5 */
byte PD6 :1; /* Port D Bit 6 */
byte PD7 :1; /* Port D Bit 7 */
} Bits;
} PORTDSTR;
#define PORTD _PORTCD.Overlap_STR.PORTDSTR.Byte
#define PORTD_PD0 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD0
#define PORTD_PD1 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD1
#define PORTD_PD2 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD2
#define PORTD_PD3 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD3
#define PORTD_PD4 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD4
#define PORTD_PD5 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD5
#define PORTD_PD6 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD6
#define PORTD_PD7 _PORTCD.Overlap_STR.PORTDSTR.Bits.PD7
#define PORTD_PD0_MASK 1
#define PORTD_PD1_MASK 2
#define PORTD_PD2_MASK 4
#define PORTD_PD3_MASK 8
#define PORTD_PD4_MASK 16
#define PORTD_PD5_MASK 32
#define PORTD_PD6_MASK 64
#define PORTD_PD7_MASK 128
} Overlap_STR;
struct {
word PD0 :1; /* Port D Bit 0 */
word PD1 :1; /* Port D Bit 1 */
word PD2 :1; /* Port D Bit 2 */
word PD3 :1; /* Port D Bit 3 */
word PD4 :1; /* Port D Bit 4 */
word PD5 :1; /* Port D Bit 5 */
word PD6 :1; /* Port D Bit 6 */
word PD7 :1; /* Port D Bit 7 */
word PC0 :1; /* Port C Bit 0 */
word PC1 :1; /* Port C Bit 1 */
word PC2 :1; /* Port C Bit 2 */
word PC3 :1; /* Port C Bit 3 */
word PC4 :1; /* Port C Bit 4 */
word PC5 :1; /* Port C Bit 5 */
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