📄 s12xfr.h
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#define SLTCTAR_SLOTCNTA_BITNUM 0
/*** SLTCTBR - Slot Counter Channel B Register; 0x00000436 ***/
typedef union {
word Word;
struct {
word SLOTCNTB :11; /* Slot Counter Value for Channel B */
word :1;
word :1;
word :1;
word :1;
word :1;
} Bits;
} SLTCTBRSTR;
extern volatile SLTCTBRSTR _SLTCTBR @(REG_BASE + 0x00000436);
#define SLTCTBR _SLTCTBR.Word
#define SLTCTBR_SLOTCNTB _SLTCTBR.Bits.SLOTCNTB
#define SLTCTBR_SLOTCNTB_MASK 2047
#define SLTCTBR_SLOTCNTB_BITNUM 0
/*** RTCORVR - Rate Correction Value Register; 0x00000438 ***/
typedef union {
word Word;
struct {
word RATECORR :16; /* Rate Correction Value */
} Bits;
} RTCORVRSTR;
extern volatile RTCORVRSTR _RTCORVR @(REG_BASE + 0x00000438);
#define RTCORVR _RTCORVR.Word
#define RTCORVR_RATECORR _RTCORVR.Bits.RATECORR
#define RTCORVR_RATECORR_MASK 65535
#define RTCORVR_RATECORR_BITNUM 0
/*** OFCORVR - Offset Correction Value Register; 0x0000043A ***/
typedef union {
word Word;
struct {
word OFFSETCORR :16; /* Offset Correction Value */
} Bits;
} OFCORVRSTR;
extern volatile OFCORVRSTR _OFCORVR @(REG_BASE + 0x0000043A);
#define OFCORVR _OFCORVR.Word
#define OFCORVR_OFFSETCORR _OFCORVR.Bits.OFFSETCORR
#define OFCORVR_OFFSETCORR_MASK 65535
#define OFCORVR_OFFSETCORR_BITNUM 0
/*** CIFRR - Combined Interrupt Flag Register; 0x0000043C ***/
typedef union {
word Word;
struct {
word TBIF :1; /* Transmit Interrupt Flag */
word RBIF :1; /* Receive Buffer Interrupt Flag */
word FNEAIF :1; /* Receive FIFO channel A Not Empty Interrupt Flag */
word FNEBIF :1; /* Receive FIFO channel B Not Empty Interrupt Flag */
word WUPIF :1; /* Wakeup Interrupt Flag */
word CHIF :1; /* CHI Interrupt Flag */
word PRIF :1; /* Protocol Interrupt Flag */
word MIF :1; /* Module Interrupt Flag */
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
} Bits;
} CIFRRSTR;
extern volatile CIFRRSTR _CIFRR @(REG_BASE + 0x0000043C);
#define CIFRR _CIFRR.Word
#define CIFRR_TBIF _CIFRR.Bits.TBIF
#define CIFRR_RBIF _CIFRR.Bits.RBIF
#define CIFRR_FNEAIF _CIFRR.Bits.FNEAIF
#define CIFRR_FNEBIF _CIFRR.Bits.FNEBIF
#define CIFRR_WUPIF _CIFRR.Bits.WUPIF
#define CIFRR_CHIF _CIFRR.Bits.CHIF
#define CIFRR_PRIF _CIFRR.Bits.PRIF
#define CIFRR_MIF _CIFRR.Bits.MIF
#define CIFRR_TBIF_MASK 1
#define CIFRR_RBIF_MASK 2
#define CIFRR_FNEAIF_MASK 4
#define CIFRR_FNEBIF_MASK 8
#define CIFRR_WUPIF_MASK 16
#define CIFRR_CHIF_MASK 32
#define CIFRR_PRIF_MASK 64
#define CIFRR_MIF_MASK 128
/*** SFCNTR - Sync Frame Counter Register; 0x00000440 ***/
typedef union {
word Word;
struct {
word SFODA :4; /* Sync Frames Channel A, odd cycle */
word SFODB :4; /* Sync Frames Channel B, odd cycle */
word SFEVA :4; /* Sync Frames Channel A, even cycle */
word SFEVB :4; /* Sync Frames Channel B, even cycle */
} Bits;
} SFCNTRSTR;
extern volatile SFCNTRSTR _SFCNTR @(REG_BASE + 0x00000440);
#define SFCNTR _SFCNTR.Word
#define SFCNTR_SFODA _SFCNTR.Bits.SFODA
#define SFCNTR_SFODB _SFCNTR.Bits.SFODB
#define SFCNTR_SFEVA _SFCNTR.Bits.SFEVA
#define SFCNTR_SFEVB _SFCNTR.Bits.SFEVB
#define SFCNTR_SFODA_MASK 15
#define SFCNTR_SFODA_BITNUM 0
#define SFCNTR_SFODB_MASK 240
#define SFCNTR_SFODB_BITNUM 4
#define SFCNTR_SFEVA_MASK 3840
#define SFCNTR_SFEVA_BITNUM 8
#define SFCNTR_SFEVB_MASK 61440
#define SFCNTR_SFEVB_BITNUM 12
/*** SFTOR - Sync Frame Table Offset Register; 0x00000442 ***/
typedef union {
word Word;
struct {
word :1;
word SFT_OFFSET1 :1; /* Sync Frame Table Offset Bit 1 */
word SFT_OFFSET2 :1; /* Sync Frame Table Offset Bit 2 */
word SFT_OFFSET3 :1; /* Sync Frame Table Offset Bit 3 */
word SFT_OFFSET4 :1; /* Sync Frame Table Offset Bit 4 */
word SFT_OFFSET5 :1; /* Sync Frame Table Offset Bit 5 */
word SFT_OFFSET6 :1; /* Sync Frame Table Offset Bit 6 */
word SFT_OFFSET7 :1; /* Sync Frame Table Offset Bit 7 */
word SFT_OFFSET8 :1; /* Sync Frame Table Offset Bit 8 */
word SFT_OFFSET9 :1; /* Sync Frame Table Offset Bit 9 */
word SFT_OFFSET10 :1; /* Sync Frame Table Offset Bit 10 */
word SFT_OFFSET11 :1; /* Sync Frame Table Offset Bit 11 */
word SFT_OFFSET12 :1; /* Sync Frame Table Offset Bit 12 */
word SFT_OFFSET13 :1; /* Sync Frame Table Offset Bit 13 */
word SFT_OFFSET14 :1; /* Sync Frame Table Offset Bit 14 */
word SFT_OFFSET15 :1; /* Sync Frame Table Offset Bit 15 */
} Bits;
struct {
word :1;
word grpSFT_OFFSET_1 :15;
} MergedBits;
} SFTORSTR;
extern volatile SFTORSTR _SFTOR @(REG_BASE + 0x00000442);
#define SFTOR _SFTOR.Word
#define SFTOR_SFT_OFFSET1 _SFTOR.Bits.SFT_OFFSET1
#define SFTOR_SFT_OFFSET2 _SFTOR.Bits.SFT_OFFSET2
#define SFTOR_SFT_OFFSET3 _SFTOR.Bits.SFT_OFFSET3
#define SFTOR_SFT_OFFSET4 _SFTOR.Bits.SFT_OFFSET4
#define SFTOR_SFT_OFFSET5 _SFTOR.Bits.SFT_OFFSET5
#define SFTOR_SFT_OFFSET6 _SFTOR.Bits.SFT_OFFSET6
#define SFTOR_SFT_OFFSET7 _SFTOR.Bits.SFT_OFFSET7
#define SFTOR_SFT_OFFSET8 _SFTOR.Bits.SFT_OFFSET8
#define SFTOR_SFT_OFFSET9 _SFTOR.Bits.SFT_OFFSET9
#define SFTOR_SFT_OFFSET10 _SFTOR.Bits.SFT_OFFSET10
#define SFTOR_SFT_OFFSET11 _SFTOR.Bits.SFT_OFFSET11
#define SFTOR_SFT_OFFSET12 _SFTOR.Bits.SFT_OFFSET12
#define SFTOR_SFT_OFFSET13 _SFTOR.Bits.SFT_OFFSET13
#define SFTOR_SFT_OFFSET14 _SFTOR.Bits.SFT_OFFSET14
#define SFTOR_SFT_OFFSET15 _SFTOR.Bits.SFT_OFFSET15
#define SFTOR_SFT_OFFSET_1 _SFTOR.MergedBits.grpSFT_OFFSET_1
#define SFTOR_SFT_OFFSET SFTOR_SFT_OFFSET_1
#define SFTOR_SFT_OFFSET1_MASK 2
#define SFTOR_SFT_OFFSET2_MASK 4
#define SFTOR_SFT_OFFSET3_MASK 8
#define SFTOR_SFT_OFFSET4_MASK 16
#define SFTOR_SFT_OFFSET5_MASK 32
#define SFTOR_SFT_OFFSET6_MASK 64
#define SFTOR_SFT_OFFSET7_MASK 128
#define SFTOR_SFT_OFFSET8_MASK 256
#define SFTOR_SFT_OFFSET9_MASK 512
#define SFTOR_SFT_OFFSET10_MASK 1024
#define SFTOR_SFT_OFFSET11_MASK 2048
#define SFTOR_SFT_OFFSET12_MASK 4096
#define SFTOR_SFT_OFFSET13_MASK 8192
#define SFTOR_SFT_OFFSET14_MASK 16384
#define SFTOR_SFT_OFFSET15_MASK 32768
#define SFTOR_SFT_OFFSET_1_MASK 65534
#define SFTOR_SFT_OFFSET_1_BITNUM 1
/*** SFTCCSR - Sync Frame Table Configuration, Control, Status Register; 0x00000444 ***/
typedef union {
word Word;
struct {
word SIDEN :1; /* Sync Frame ID Table Enable */
word SDVEN :1; /* Sync Frame Deviation Table Enable */
word OPT :1; /* One Pair Trigger */
word :1;
word OVAL :1; /* Odd Cycle Tables Valid */
word EVAL :1; /* Even Cycle Tables Valid */
word OLKS :1; /* Odd Cycle Tables Lock Status */
word ELKS :1; /* Even Cycle Tables Lock Status */
word CYCNUM :6; /* Cycle Number */
word OLKT :1; /* Odd Cycle Tables Lock/Unlock Trigger */
word ELKT :1; /* Even Cycle Tables Lock/Unlock Trigger */
} Bits;
} SFTCCSRSTR;
extern volatile SFTCCSRSTR _SFTCCSR @(REG_BASE + 0x00000444);
#define SFTCCSR _SFTCCSR.Word
#define SFTCCSR_SIDEN _SFTCCSR.Bits.SIDEN
#define SFTCCSR_SDVEN _SFTCCSR.Bits.SDVEN
#define SFTCCSR_OPT _SFTCCSR.Bits.OPT
#define SFTCCSR_OVAL _SFTCCSR.Bits.OVAL
#define SFTCCSR_EVAL _SFTCCSR.Bits.EVAL
#define SFTCCSR_OLKS _SFTCCSR.Bits.OLKS
#define SFTCCSR_ELKS _SFTCCSR.Bits.ELKS
#define SFTCCSR_CYCNUM _SFTCCSR.Bits.CYCNUM
#define SFTCCSR_OLKT _SFTCCSR.Bits.OLKT
#define SFTCCSR_ELKT _SFTCCSR.Bits.ELKT
#define SFTCCSR_SIDEN_MASK 1
#define SFTCCSR_SDVEN_MASK 2
#define SFTCCSR_OPT_MASK 4
#define SFTCCSR_OVAL_MASK 16
#define SFTCCSR_EVAL_MASK 32
#define SFTCCSR_OLKS_MASK 64
#define SFTCCSR_ELKS_MASK 128
#define SFTCCSR_CYCNUM_MASK 16128
#define SFTCCSR_CYCNUM_BITNUM 8
#define SFTCCSR_OLKT_MASK 16384
#define SFTCCSR_ELKT_MASK 32768
/*** SFIDRFR - Sync Frame ID Rejection Filter Register; 0x00000446 ***/
typedef union {
word Word;
struct {
word SYNFRID :10; /* Sync Frame Rejection ID */
word :1;
word :1;
word :1;
word :1;
word :1;
word :1;
} Bits;
} SFIDRFRSTR;
extern volatile SFIDRFRSTR _SFIDRFR @(REG_BASE + 0x00000446);
#define SFIDRFR _SFIDRFR.Word
#define SFIDRFR_SYNFRID _SFIDRFR.Bits.SYNFRID
#define SFIDRFR_SYNFRID_MASK 1023
#define SFIDRFR_SYNFRID_BITNUM 0
/*** SFIDAFVR - Sync Frame ID Acceptance Filter Value Register; 0x00000448 ***/
typedef union {
word Word;
struct {
word FVAL :10; /* Filter Value */
word :1;
word :1;
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