📄 smivga.c
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void memregInit()
{
#if 0 /*x86*/
/*DPR register*/
*((volatile UINT32 *)(0xdc408000+0x0)) = 0xffabfcbb;
*((volatile UINT32 *)(0xdc408000+0x4)) = 0xf64ffef5;
*((volatile UINT32 *)(0xdc408000+0x8)) = 0xfddeffff;
*((volatile UINT32 *)(0xdc408000+0xc)) = 0x0;
*((volatile UINT32 *)(0xdc408000+0x10)) = 0xf3fffe6f;
*((volatile UINT32 *)(0xdc408000+0x14)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x18)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x1c)) = 0x80c0f000;
*((volatile UINT32 *)(0xdc408000+0x20)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x24)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x28)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x2c)) = 0xf777d1ff;
*((volatile UINT32 *)(0xdc408000+0x30)) = 0xf3ebf018;
*((volatile UINT32 *)(0xdc408000+0x34)) = 0x9a6abffb;
*((volatile UINT32 *)(0xdc408000+0x38)) = 0xfaffbdbf;
*((volatile UINT32 *)(0xdc408000+0x3c)) = 0xff7ffbe5;
*((volatile UINT32 *)(0xdc408000+0x40)) = 0xfff2edfe;
*((volatile UINT32 *)(0xdc408000+0x44)) = 0xfff9dbdf;
/*VPR register*/
*((volatile UINT32 *)(0xdc40c000+0x0)) = 0x20000;
*((volatile UINT32 *)(0xdc40c000+0x4)) = 0xab83e877;
*((volatile UINT32 *)(0xdc40c000+0x8)) = 0xc92668bb;
*((volatile UINT32 *)(0xdc40c000+0xc)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x10)) = 0xa000a0;
*((volatile UINT32 *)(0xdc40c000+0x14)) = 0x5a30727;
*((volatile UINT32 *)(0xdc40c000+0x18)) = 0x5bf0755;
*((volatile UINT32 *)(0xdc40c000+0x1c)) = 0x54d35;
*((volatile UINT32 *)(0xdc40c000+0x20)) = 0x2ab0349;
*((volatile UINT32 *)(0xdc40c000+0x24)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x28)) = 0x5ff02fe;
*((volatile UINT32 *)(0xdc40c000+0x2c)) = 0xa90595;
*((volatile UINT32 *)(0xdc40c000+0x30)) = 0x17f1e;
*((volatile UINT32 *)(0xdc40c000+0x34)) = 0x28c0298;
*((volatile UINT32 *)(0xdc40c000+0x38)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x3c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x40)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x44)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x4c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x50)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x54)) = 0x1026543;
*((volatile UINT32 *)(0xdc40c000+0x58)) = 0x444;
*((volatile UINT32 *)(0xdc40c000+0x5c)) = 0xededed;
*((volatile UINT32 *)(0xdc40c000+0x60)) = 0x10a;
*((volatile UINT32 *)(0xdc40c000+0x64)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x68)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x6c)) = 0x0;
/*CPR register*/
*((volatile UINT32 *)(0xdc40e000+0x0)) = 0x8;
*((volatile UINT32 *)(0xdc40e000+0x4)) = 0x103028f;
*((volatile UINT32 *)(0xdc40e000+0x8)) = 0x4f20434;
*((volatile UINT32 *)(0xdc40e000+0xc)) = 0x45fe0;
*((volatile UINT32 *)(0xdc40e000+0x10)) = 0x1129e;
*((volatile UINT32 *)(0xdc40e000+0x14)) = 0x64;
*((volatile UINT32 *)(0xdc40e000+0x18)) = 0x6;
#endif
#if 0/*linux*/
/*DPR register*/
*((volatile UINT32 *)(0xdc408000+0x0)) = 0xc140c26f;
*((volatile UINT32 *)(0xdc408000+0x4)) = 0xf000f000;
*((volatile UINT32 *)(0xdc408000+0x8)) = 0xf320c258;
*((volatile UINT32 *)(0xdc408000+0xc)) = 0x0;
*((volatile UINT32 *)(0xdc408000+0x10)) = 0xf320f320;
*((volatile UINT32 *)(0xdc408000+0x14)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x18)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x1c)) = 0x80c0f000;
*((volatile UINT32 *)(0xdc408000+0x20)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x24)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x28)) = 0xff000000;
*((volatile UINT32 *)(0xdc408000+0x2c)) = 0xf000c000;
*((volatile UINT32 *)(0xdc408000+0x30)) = 0xf124f20c;
*((volatile UINT32 *)(0xdc408000+0x34)) = 0x5bfe9d8f;
*((volatile UINT32 *)(0xdc408000+0x38)) = 0x76a3dfb9;
*((volatile UINT32 *)(0xdc408000+0x3c)) = 0xf320f320;
*((volatile UINT32 *)(0xdc408000+0x40)) = 0xfff2ef31;
*((volatile UINT32 *)(0xdc408000+0x44)) = 0xfff00000;
/*VPR register*/
*((volatile UINT32 *)(0xdc40c000+0x0)) = 0x20000;
*((volatile UINT32 *)(0xdc40c000+0x4)) = 0x4346401d;
*((volatile UINT32 *)(0xdc40c000+0x8)) = 0x7c732407;
*((volatile UINT32 *)(0xdc40c000+0xc)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x10)) = 0xa200a0;
*((volatile UINT32 *)(0xdc40c000+0x14)) = 0x58056d;
*((volatile UINT32 *)(0xdc40c000+0x18)) = 0x68c01f9;
*((volatile UINT32 *)(0xdc40c000+0x1c)) = 0x1290b;
*((volatile UINT32 *)(0xdc40c000+0x20)) = 0x440240;
*((volatile UINT32 *)(0xdc40c000+0x24)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x28)) = 0x24c0434;
*((volatile UINT32 *)(0xdc40c000+0x2c)) = 0x5000148;
*((volatile UINT32 *)(0xdc40c000+0x30)) = 0x15940;
*((volatile UINT32 *)(0xdc40c000+0x34)) = 0x1030080;
*((volatile UINT32 *)(0xdc40c000+0x38)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x3c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x40)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x44)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x4c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x50)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x54)) = 0x7216543;
*((volatile UINT32 *)(0xdc40c000+0x58)) = 0x444;
*((volatile UINT32 *)(0xdc40c000+0x5c)) = 0xededed;
*((volatile UINT32 *)(0xdc40c000+0x60)) = 0x68;
*((volatile UINT32 *)(0xdc40c000+0x64)) = 0x1;
*((volatile UINT32 *)(0xdc40c000+0x68)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x6c)) = 0x0;
/*CPR register*/
*((volatile UINT32 *)(0xdc40e000+0x0)) = 0x8;
*((volatile UINT32 *)(0xdc40e000+0x4)) = 0x400e8;
*((volatile UINT32 *)(0xdc40e000+0x8)) = 0x20028;
*((volatile UINT32 *)(0xdc40e000+0xc)) = 0x4b858;
*((volatile UINT32 *)(0xdc40e000+0x10)) = 0x48310;
*((volatile UINT32 *)(0xdc40e000+0x14)) = 0x89;
*((volatile UINT32 *)(0xdc40e000+0x18)) = 0x6;
#endif
/*DPR register*/
*((volatile UINT32 *)(0xdc408000+0x0)) = LONGSWAP(0xc140c26f);
*((volatile UINT32 *)(0xdc408000+0x4)) = LONGSWAP(0xf000f000);
*((volatile UINT32 *)(0xdc408000+0x8)) = LONGSWAP(0xf320c258);
*((volatile UINT32 *)(0xdc408000+0xc)) = LONGSWAP(0x0);
*((volatile UINT32 *)(0xdc408000+0x10)) = LONGSWAP(0xf320f320);
*((volatile UINT32 *)(0xdc408000+0x14)) = LONGSWAP(0xff000000);
*((volatile UINT32 *)(0xdc408000+0x18)) = LONGSWAP(0xff000000);
*((volatile UINT32 *)(0xdc408000+0x1c)) = LONGSWAP(0x80c0f000);
*((volatile UINT32 *)(0xdc408000+0x20)) = LONGSWAP(0xff000000);
*((volatile UINT32 *)(0xdc408000+0x24)) = LONGSWAP(0xff000000);
*((volatile UINT32 *)(0xdc408000+0x28)) = LONGSWAP(0xff000000);
*((volatile UINT32 *)(0xdc408000+0x2c)) = LONGSWAP(0xf000c000);
*((volatile UINT32 *)(0xdc408000+0x30)) = LONGSWAP(0xf124f20c);
*((volatile UINT32 *)(0xdc408000+0x34)) = LONGSWAP(0x5bfe9d8f);
*((volatile UINT32 *)(0xdc408000+0x38)) = LONGSWAP(0x76a3dfb9);
*((volatile UINT32 *)(0xdc408000+0x3c)) = LONGSWAP(0xf320f320);
*((volatile UINT32 *)(0xdc408000+0x40)) = LONGSWAP(0xfff2ef31);
*((volatile UINT32 *)(0xdc408000+0x44)) = LONGSWAP(0xfff00000);
/*VPR register*/
*((volatile UINT32 *)(0xdc40c000+0x0)) = LONGSWAP(0x20000);
*((volatile UINT32 *)(0xdc40c000+0x4)) = LONGSWAP(0x4346401d);
*((volatile UINT32 *)(0xdc40c000+0x8)) = LONGSWAP(0x7c732407);
*((volatile UINT32 *)(0xdc40c000+0xc)) = LONGSWAP(0x0);
*((volatile UINT32 *)(0xdc40c000+0x10)) = LONGSWAP(0xa200a0);
*((volatile UINT32 *)(0xdc40c000+0x14)) = LONGSWAP(0x58056d);
*((volatile UINT32 *)(0xdc40c000+0x18)) = LONGSWAP(0x68c01f9);
*((volatile UINT32 *)(0xdc40c000+0x1c)) = LONGSWAP(0x1290b);
*((volatile UINT32 *)(0xdc40c000+0x20)) = LONGSWAP(0x440240);
*((volatile UINT32 *)(0xdc40c000+0x24)) = LONGSWAP(0x0);
*((volatile UINT32 *)(0xdc40c000+0x28)) = LONGSWAP(0x24c0434);
*((volatile UINT32 *)(0xdc40c000+0x2c)) = LONGSWAP(0x5000148);
*((volatile UINT32 *)(0xdc40c000+0x30)) = LONGSWAP(0x15940);
*((volatile UINT32 *)(0xdc40c000+0x34)) = LONGSWAP(0x1030080);
*((volatile UINT32 *)(0xdc40c000+0x38)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x3c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x40)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x44)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x48)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x4c)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x50)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x54)) = LONGSWAP(0x7216543);
*((volatile UINT32 *)(0xdc40c000+0x58)) = LONGSWAP(0x444);
*((volatile UINT32 *)(0xdc40c000+0x5c)) = LONGSWAP(0xededed);
*((volatile UINT32 *)(0xdc40c000+0x60)) = LONGSWAP(0x68);
*((volatile UINT32 *)(0xdc40c000+0x64)) = LONGSWAP(0x1);
*((volatile UINT32 *)(0xdc40c000+0x68)) = 0x0;
*((volatile UINT32 *)(0xdc40c000+0x6c)) = 0x0;
/*CPR register*/
*((volatile UINT32 *)(0xdc40e000+0x0)) = LONGSWAP(0x8);
*((volatile UINT32 *)(0xdc40e000+0x4)) = LONGSWAP(0x400e8);
*((volatile UINT32 *)(0xdc40e000+0x8)) = LONGSWAP(0x20028);
*((volatile UINT32 *)(0xdc40e000+0xc)) = LONGSWAP(0x4b858);
*((volatile UINT32 *)(0xdc40e000+0x10)) = LONGSWAP(0x48310);
*((volatile UINT32 *)(0xdc40e000+0x14)) = LONGSWAP(0x89);
*((volatile UINT32 *)(0xdc40e000+0x18)) = LONGSWAP(0x6);
}
void memregread()
{
int i;
printf("DPR register DPR00 - DPR44:\n");
for(i=0;i<=0x44;i+=4)
{
printf("index=0x%x,value=0x%x\n",i,*((volatile UINT32 *)(0xdc408000+i)));
}
printf("VPR register VPR00 - VPR6c:\n");
for(i=0;i<=0x6c;i+=4)
{
printf("index=0x%x,value=0x%x\n",i,*((volatile UINT32 *)(0xdc40c000+i)));
}
printf("CPR register CPR00 - CPR18:\n");
for(i=0;i<=0x18;i+=4)
{
printf("index=0x%x,value=0x%x\n",i,*((volatile UINT32 *)(0xdc40e000+i)));
}
}
void VgaSequencerInit(SMI_DRIVER * pDriver)
{
int i;
int depth = pDriver->generic.ugi.pMode->colorDepth;
if (depth == 4)
pDriver->vgaregs.SEQ[0] = 0x02;
else
pDriver->vgaregs.SEQ[0] = 0x00;
#if 0
/* snippet of original XFree86 logic, worth investigating but I don't understand it right now */
if (mode->Flags & V_CLKDIV2)
pDriver->vgaregs.SEQ[1] = 0x09;
else
pDriver->vgaregs.SEQ[1] = 0x01;
#endif
pDriver->vgaregs.SEQ[1] = 0x01;
pDriver->vgaregs.SEQ[3] = 0x00;
if (depth == 1)
pDriver->vgaregs.SEQ[2] = 1 << 3;
else
pDriver->vgaregs.SEQ[2] = 0x0F;
if (depth < 8)
pDriver->vgaregs.SEQ[4] = 0x06;
else
pDriver->vgaregs.SEQ[4] = 0x0E;
for(i = 0; i < (sizeof(pDriver->vgaregs.SEQ) / sizeof(pDriver->vgaregs.SEQ[0])); i++)
{
smiWriteVgaIndexed(pDriver, VGA_SEQUENCER_REG, VGA_SEQUENCER_DATA, i, pDriver->vgaregs.SEQ[i]);
}
}
void VgaAttributeInit(SMI_DRIVER * pDriver)
{
int i;
for(i = 0; i <= 0x0f; i++)
{
/* ATR[0] through ATR[0xf] */
pDriver->vgaregs.ATR[i] = i;
}
pDriver->vgaregs.ATR[16] = 0x41;
pDriver->vgaregs.ATR[17] = 0xFF; /* revisit */
pDriver->vgaregs.ATR[18] = 0x0F;
pDriver->vgaregs.ATR[19] = 0x00;
pDriver->vgaregs.ATR[20] = 0x00;
smiReadVga(pDriver, VGA_IN_STAT1_REG); /* reset Attribute controller's flip flip */
for(i = 0; i < (sizeof(pDriver->vgaregs.ATR) / sizeof(pDriver->vgaregs.ATR[0])); i++)
{
smiWriteVgaIndexed(pDriver, VGA_ATTRIBUTE_REG, VGA_ATTRIBUTE_REG, i, pDriver->vgaregs.ATR[i]);
}
}
void VgaGraphicsInit(SMI_DRIVER * pDriver)
{
int i;
pDriver->vgaregs.GRX[0] = 0;
pDriver->vgaregs.GRX[1] = 0;
pDriver->vgaregs.GRX[2] = 0;
pDriver->vgaregs.GRX[3] = 0;
pDriver->vgaregs.GRX[4] = 0; /* revisit */
pDriver->vgaregs.GRX[5] = 40; /* revisit */
pDriver->vgaregs.GRX[6] = 0x05;
pDriver->vgaregs.GRX[7] = 0x0F;
pDriver->vgaregs.GRX[8] = 0xFF;
for(i = 0; i < (sizeof(pDriver->vgaregs.ATR) / sizeof(pDriver->vgaregs.ATR[0])); i++)
{
smiWriteVgaIndexed(pDriver, VGA_GRAPHICS_REG, VGA_GRAPHICS_DATA, i, pDriver->vgaregs.GRX[i]);
}
}
void VgaCRTCInit(SMI_DRIVER * pDriver)
{
int i;
DISPLAYMODE * mode = pDriver->mode;
VGARegisters * regp = &pDriver->vgaregs;
/*
* XXX
*
* The following is taken from VGA, but applies to other cores as well.
*/
mode->CrtcVBlankStart = min(mode->CrtcVSyncStart, mode->CrtcVDisplay);
mode->CrtcVBlankEnd = max(mode->CrtcVSyncEnd, mode->CrtcVTotal);
if ((mode->CrtcVBlankEnd - mode->CrtcVBlankStart) >= 127) {
/*
* V Blanking size must be < 127.
* Moving blank start forward is safer than moving blank end
* back, since monitors clamp just AFTER the sync pulse (or in
* the sync pulse), but never before.
*/
mode->CrtcVBlankStart = mode->CrtcVBlankEnd - 127;
}
mode->CrtcHBlankStart = min(mode->CrtcHSyncStart, mode->CrtcHDisplay);
mode->CrtcHBlankEnd = max(mode->CrtcHSyncEnd, mode->CrtcHTotal);
if ((mode->CrtcHBlankEnd - mode->CrtcHBlankStart) >= 63 * 8) {
/*
* H Blanking size must be < 63*8. Same remark as above.
*/
mode->CrtcHBlankStart = mode->CrtcHBlankEnd - 63 * 8;
}
regp->CRTC[0] = (mode->CrtcHTotal >> 3) - 5;
regp->CRTC[1] = (mode->CrtcHDisplay >> 3) - 1;
regp->CRTC[2] = (mode->CrtcHBlankStart >> 3) - 1;
regp->CRTC[3] = (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F) | 0x80;
i = (((mode->CrtcHSkew << 2) + 0x10) & ~0x1F);
if (i < 0x80)
regp->CRTC[3] |= i;
regp->CRTC[4] = (mode->CrtcHSyncStart >> 3);
regp->CRTC[5] = ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2)
| (((mode->CrtcHSyncEnd >> 3)) & 0x1F);
regp->CRTC[6] = (mode->CrtcVTotal - 2) & 0xFF;
regp->CRTC[7] = (((mode->CrtcVTotal - 2) & 0x100) >> 8)
| (((mode->CrtcVDisplay - 1) & 0x100) >> 7)
| ((mode->CrtcVSyncStart & 0x100) >> 6)
| (((mode->CrtcVBlankStart - 1) & 0x100) >> 5)
| 0x10
| (((mode->CrtcVTotal - 2) & 0x200) >> 4)
| (((mode->CrtcVDisplay - 1) & 0x200) >> 3)
| ((mode->CrtcVSyncStart & 0x200) >> 2);
regp->CRTC[8] = 0x00;
regp->CRTC[9] = (((mode->CrtcVBlankStart - 1) & 0x200) >> 4) | 0x40;
#if 0
if (mode->Flags & V_DBLSCAN)
regp->CRTC[9] |= 0x80;
if (mode->VScan >= 32)
regp->CRTC[9] |= 0x1F;
else if (mode->VScan > 1)
regp->CRTC[9] |= mode->VScan - 1;
#endif
regp->CRTC[10] = 0x00;
regp->CRTC[11] = 0x00;
regp->CRTC[12] = 0x00;
regp->CRTC[13] = 0x00;
regp->CRTC[14] = 0x00;
regp->CRTC[15] = 0x00;
regp->CRTC[16] = mode->CrtcVSyncStart & 0xFF;
regp->CRTC[17] = (mode->CrtcVSyncEnd & 0x0F) | 0x20;
regp->CRTC[18] = (mode->CrtcVDisplay - 1) & 0xFF;
regp->CRTC[19] = pDriver->generic.ugi.pMode->width >> 4;
regp->CRTC[20] = 0x00;
regp->CRTC[21] = (mode->CrtcVBlankStart - 1) & 0xFF;
regp->CRTC[22] = (mode->CrtcVBlankEnd - 1) & 0xFF;
if (pDriver->generic.ugi.pMode->colorDepth < 8)
regp->CRTC[23] = 0xE3;
else
regp->CRTC[23] = 0xC3;
regp->CRTC[24] = 0xFF;
for(i = 0; i < 25; i++)
{
smiWriteVgaIndexed(pDriver, VGA_CRTC_REG, VGA_CRTC_DATA, i, regp->CRTC[i]);
}
}
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