📄 syslib.c
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# error "Dynamic memory sizing not supported"
#else
/* Don't do autosizing, size is given */
physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
#endif /* LOCAL_MEM_AUTOSIZE */
}
return physTop;
}
/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h. This routine returns the address of the reserved memory
* area. The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/
char * sysMemTop (void)
{
static char * memTop = NULL;
if (memTop == NULL)
{
memTop = sysPhysMemTop () - USER_RESERVED_MEM;
}
return memTop;
}
/*******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor. Normally, it is called
* only by reboot()--which services ^X--and by bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* The entry point for a warm boot is defined by the macro ROM_WARM_ADRS
* in config.h. We do an absolute jump to this address to enter the
* ROM code.
*
* RETURNS: Does not return.
*/
STATUS sysToMonitor
(
int startType /* parameter passed to ROM to tell it how to boot */
)
{
FUNCPTR pRom = (FUNCPTR) (ROM_WARM_ADRS);
int ix;
intLock (); /* disable interrupts */
cacheDisable (INSTRUCTION_CACHE); /* Disable the Instruction Cache */
cacheDisable (DATA_CACHE); /* Disable the Data Cache */
#if (CPU == PPC604)
vxHid0Set (vxHid0Get () & ~_PPC_HID0_SIED); /* Enable Serial Instr Exec */
#endif /* (CPU == PPC604) */
/* Turn off timer */
#ifdef INCLUDE_AUXCLK
sysAuxClkDisable();
#endif
/* turn off all i8259 int's */
for (ix = 0; ix < VT_MAX_IRQS; ix++)
{
intDisable (ix + INT_NUM_IRQ0);
}
for (ix = 0; ix < EPIC_MAX_EXT_IRQS; ix++)
{
intDisable (ix);
}
#if 0
sysEpicInit(EPIC_DIRECT_IRQ, (ULONG)0); /* reset the epic registers */
#endif
#if FALSE /* sandpoint errata: do not enable this until fixed in X3 rev */
{
UINT8 resetVal;
pciConfigInByte (WB_PCI_BUS, WB_PCI_DEV, WB_PCI_FUNC,
WB_PCI_CLK_DIV_INDX, &resetVal);
pciConfigOutByte (WB_PCI_BUS, WB_PCI_DEV, WB_PCI_FUNC,
WB_PCI_CLK_DIV_INDX, (resetVal | WB_RSTDRV_BIT));
/* 50 ms delay to allow ISA & PCI RST to settle */
sysMsDelay (50);
}
#endif
vxMsrSet (0); /* Clear the MSR */
(*pRom) (startType); /* jump off to romInit.s */
return (OK); /* in case we continue from ROM monitor */
}
/*******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
*
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/
int sysProcNumGet (void)
{
return (sysProcNum);
}
/*******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board. Processor numbers
* should be unique on a single backplane.
*
* For bus systems, it is assumes that processor 0 is the bus master and
* exports its memory to the bus.
*
* RETURNS: N/A
*
* SEE ALSO: sysProcNumGet()
*/
void sysProcNumSet
(
int procNum /* processor number */
)
{
sysProcNum = procNum;
if (procNum == 0)
{
}
}
/*******************************************************************************
*
* sysCpuCheck - confirm the CPU type
*
* This routine validates the cpu type. If the wrong cpu type is discovered
* a message is printed using the serial channel in polled mode.
*
* RETURNS: N/A.
*/
void sysCpuCheck (void)
{
int msgSize;
int msgIx;
SIO_CHAN * pSioChan; /* serial I/O channel */
/* Check for a valid CPU type; If one is found, just return */
#if (CPU == PPC603) /* five kinds of 603 */
if ((CPU_TYPE == CPU_TYPE_603) ||
(CPU_TYPE == CPU_TYPE_603E) ||
(CPU_TYPE == CPU_TYPE_603P) ||
(CPU_TYPE == CPU_TYPE_750) ||
(CPU_TYPE == CPU_TYPE_8245) ||
(CPU_TYPE == CPU_TYPE_8240))
{
return;
}
#elif (CPU == PPC604) /* four kinds of 604 */
if ((CPU_TYPE == CPU_TYPE_604) ||
(CPU_TYPE == CPU_TYPE_604E) ||
(CPU_TYPE == CPU_TYPE_604R) ||
(CPU_TYPE == CPU_TYPE_750) ||
(CPU_TYPE == CPU_TYPE_7400) ||
(CPU_TYPE == CPU_TYPE_7410) ||
(CPU_TYPE == CPU_TYPE_7450) ||
(CPU_TYPE == CPU_TYPE_7455))
{
return;
}
#endif /* (CPU == PPC604) */
/* Invalid CPU type; polling print of error message and bail */
msgSize = strlen (wrongCpuMsg);
sysSerialHwInit ();
pSioChan = sysSerialChanGet (0);
sioIoctl (pSioChan, SIO_MODE_SET, (void *) SIO_MODE_POLL);
for (msgIx = 0; msgIx < msgSize; msgIx++)
{
while (sioPollOutput (pSioChan, wrongCpuMsg[msgIx]) == EAGAIN);
}
sysToMonitor (BOOT_NO_AUTOBOOT);
}
/*******************************************************************************
*
* sysDelay - delay for approximately one millisecond
*
* Delay for approximately one milli-second.
*
* RETURNS: N/A
*/
void sysDelay (void)
{
sysMsDelay (1);
}
/*******************************************************************************
*
* sysMsDelay - delay for the specified amount of time (MS)
*
* This routine will delay for the specified amount of time by counting
* decrementer ticks.
*
* This routine is not dependent on a particular rollover value for
* the decrementer, it should work no matter what the rollover
* value is.
*
* A small amount of count may be lost at the rollover point resulting in
* the sysMsDelay() causing a slightly longer delay than requested.
*
* This routine will produce incorrect results if the delay time requested
* requires a count larger than 0xffffffff to hold the decrementer
* elapsed tick count. For a System Bus Speed of 67 MHZ this amounts to
* about 258 seconds.
*
* RETURNS: N/A
*/
void sysMsDelay
(
UINT delay /* length of time in MS to delay */
)
{
register UINT oldval; /* decrementer value */
register UINT newval; /* decrementer value */
register UINT totalDelta; /* Dec. delta for entire delay period */
register UINT decElapsed; /* cumulative decrementer ticks */
/*
* Calculate delta of decrementer ticks for desired elapsed time.
* The macro DEC_CLOCK_FREQ MUST REFLECT THE PROPER 6xx BUS SPEED.
*/
totalDelta = ((DEC_CLOCK_FREQ / 4) / 1000) * delay;
/*
* Now keep grabbing decrementer value and incrementing "decElapsed" until
* we hit the desired delay value. Compensate for the fact that we may
* read the decrementer at 0xffffffff before the interrupt service
* routine has a chance to set in the rollover value.
*/
decElapsed = 0;
oldval = vxDecGet ();
while (decElapsed < totalDelta)
{
newval = vxDecGet ();
if ( DELTA(oldval,newval) < 1000 )
decElapsed += DELTA(oldval,newval); /* no rollover */
else
if (newval > oldval)
decElapsed += abs((int)oldval); /* rollover */
oldval = newval;
}
}
/*******************************************************************************
*
* sysIntConnect - connect the BSP interrupt to the proper epic/i8259 handler.
*
* This routine checks the INT level and connects the proper routine.
* pciIntConnect() or intConnect().
*
* RETURNS:
* OK, or ERROR if the interrupt handler cannot be built.
*
*/
STATUS sysIntConnect
(
VOIDFUNCPTR *vector, /* interrupt vector to attach to */
VOIDFUNCPTR routine, /* routine to be called */
int parameter /* parameter to be passed to routine */
)
{
int tmpStat = ERROR;
UINT32 read;
if (((int) vector < 0) || ((int) vector > INT_VEC_IRQ0 + VT_MAX_IRQS))
{
logMsg ("Error in sysIntConnect: Level = %d.\n",
(int)vector,2,3,4,5,6);
return (ERROR);
}
if (vxMemProbe ((char *) routine, VX_READ, 4, (char *) &read) != OK)
{
logMsg ("Error in sysIntConnect: Cannot access routine.\n",
1,2,3,4,5,6);
return (ERROR);
}
switch ((int)vector)
{
/*
* add INT_VEC_IRQ0 before calling pciIntConnect since it subtracts
* it and the EPIC which deals with PCI ints needs to be passed
* original vector
*/
case (PCI_XINT1_LVL):
{
tmpStat = pciIntConnect (vector+INT_VEC_IRQ0, routine, parameter);
break;
}
case (PCI_XINT2_LVL):
{
tmpStat = pciIntConnect (vector+INT_VEC_IRQ0, routine, parameter);
break;
}
case (PCI_XINT3_LVL):
{
tmpStat = pciIntConnect (vector+INT_VEC_IRQ0, routine, parameter);
break;
}
case (PCI_XINT4_LVL):
{
tmpStat = pciIntConnect (vector+INT_VEC_IRQ0, routine, parameter);
break;
}
default:
{
tmpStat = intConnect (vector, routine, parameter);
break;
}
} /* End switch */
if (tmpStat == ERROR)
{
logMsg ("Error in sysIntConnect: vector = %d.\n",
(int)vector,2,3,4,5,6);
}
return (tmpStat);
}
/*******************************************************************************
*
* sysIntEnablePIC - enable an ISA/PCI interrupt
*
* This function call is used to enable an ISA/PCI interrupt.
*
* RETURNS: OK or ERROR if unable to enable interrupt.
*/
STATUS sysIntEnablePIC
(
int intNum
)
{
if ((intNum < 0) || (intNum > (INT_NUM_IRQ0 + VT_MAX_IRQS)))
{
logMsg ("sysIntEnablePIC: Invalid interrupt number %d.\n",
intNum,2,3,4,5,6);
return (ERROR);
}
return (intEnable (intNum));
}
/*******************************************************************************
*
* sysIntEnable - enable an interrupt
*
* This function call is used to enable an ISA/PCI interrupt.
*
* RETURNS: OK or ERROR if unable to enable interrupt.
*/
STATUS sysIntEnable
(
int intNum
)
{
return (sysIntEnablePIC (intNum));
}
/*******************************************************************************
*
* sysIntDisable - disable an interrupt
*
* This function call is used to disable an interrupt.
*
* RETURNS: OK or ERROR if unable to disable interrupt.
*/
STATUS sysIntDisable
(
int intNum
)
{
return (intDisable (intNum));
}
#ifdef INCLUDE_ATA_686
/*******************************************************************************
*
* sysInByteString - reads a string of bytes from an io address.
*
* This function reads a byte string from a specified o address.
*
* RETURNS: N/A
*/
void sysInByteString
(
ULONG ioAddr,
char * bufPtr,
int nBytes
)
{
int loopCtr;
for (loopCtr = 0; loopCtr < nBytes; loopCtr++)
{
PPC_EIEIO_SYNC;
*bufPtr++ = *(char *)ioAddr;
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