📄 target.nr
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.so wrs.an
.\" target.nr - sandpoint target specific documentation
.\"
.\" Copyright 1984-2000 Wind River Systems, Inc.
.\"
.\" modification history
.\" --------------------
.\" 01a,16jul02,pcs Add support for PPMC8241.
.\" 01a,24jun02,kab Update for Gyrus/7441 board
.\" 01a,23may02,pcs Add support for PPMC7441/PPMC7445
.\" 01a,27mar02,pcs Add support for PPMC7455.
.\" 01k,05jun01,pch Fix typos, catch up modification history.
.\" 01j,05jun01,pcs Add support for PPMC750.
.\" 01i,19apr01,pcs ADD Switch settings for SP3.
.\" 01h,13apr01,pcs Remove/Fix FIXME comments.
.\" 01g,13apr01,mil Add coverage of 7410 to description of L2 Private Memory
.\" 01f,12apr01,pcs Update Switch SW1/SW2 settings.
.\" 01e,11apr01,mil Added info for 7410
.\" 01d,10apr01,pch Add support for 7400 MPMC rev X3; various cleanups.
.\" 01c,15jan01,pcs sp ph2 release , as received from teamF1.
.\" 01b,15jan01,pcs post sp ph1 release , as received from teamF1.
.\" 01a,26oct00,kab Imported from Sunnyvale.
.\"
.TH sandpoint T "Motorola Sandpoint X2" "Rev: 1.01 JUNE 99" "TORNADO REFERENCE: VXWORKS"
.SH "NAME"
.aX "Motorola SANDPOINT X2 Model 1 / X3(in X2 compatable mode) "
.SH "INTRODUCTION"
This document describes the features of the Sandpoint reference host board
with various PCI Processor Mezzanine Card (PPMC). The PPMC modules include
the Unity (8240/8245/8241), Talos (745), Altimus (750/755/7400/7410),
Gyrus (7441/7445) and the Valis (7450/7455).
The various BSPs that provide support for these PPMC modules
are the sp824x (8240/8245), sp7xx (745/750/755), sp74xx (7400/7410) ,
sp7450(7450), sp7455(7455), sp7445(7445) & sp7441(7441).
The board contains one PMC/PPMC - compatible slot, four PCI
slots, Keyboard/mouse, floppy and IDE disk controllers. Sandpoint is
intended for hardware and software development and evaluation purpose
only, and is not intended for operation in commercial environments.
This BSP currently supports the X2 baseboard and the X3 baseboard in X2
compatibility mode.
.SS "Bootrom"
The ROM device is an AMD AM29F040, or equivalent, residing in position
U6. It is addressed from 0xFFF00000 to 0xFFF80000 (512K). The
ROM resides on the ISA bus. 29F040 devices residing in socket U6 may
be reprogrammed from the VxWorks kernel using the BSP routine
sysUpdateFlash(), from sysLib.c. This U6 socket is where the VxWorks
bootrom should be installed into.
.SS "RTC and NVRAM"
The BSP supports non-volatile RAM; thus boot parameters will be preserved
whenever the system is powered off. Sandpoint incorporates an 8KB battery
backed SRAM, which is organized as 8kbx8 and is used for the storage of
system configuration information such as:
.IP
Passwords
.IP
Boot record
.IP
Global environment parameters
.IP
Language data
.LP
To load VxWorks, and for more information, follow the instructions in the
.I "Tornado User's Guide: Getting Started."
.SS "Jumpers and Switches"
The Sandpoint X2/X3 allow flexible operating configuration based on the
settings of jumpers and switches on the base board and the PPMC modules.
Note that the meaning of a jumper position or switch setting changes
from revision to revision of the base board, as well as the PPMC modules.
Refer to the Sandpoint System Documentation for correct interpretation of
various configurations for the exact revisions of the base board and PPMC
module in focus.
.TS E
expand;
lf3 lf3 lf3
l l l .
.sp .2
SNo. Jumper Function
_
1. J30,31,32| VIO selection jumpers
2. J33 Test Clock Input
3. J34 66MHz PCI Disable
.TE
.SS "SP2 Switches"
.TS E
expand,tab(|);
lf3 lf3 lf3 lf3
l l l l .
.sp .4
SNo. | Switch | Function | Mode
_
1 | S1 | Power On/Off Switch |
2 | S2 | Reset Switch |
3 | S3, S4 | Mode Selection Switch | 1 |
4 | S5 | Input Inversion Switch | Inverted Mode |
5 | S6 | Winbond IRQ selection Switch | Winbond IRQ shared with slot 2 |
.TE
.SS "System Frequency Selection Jumpers"
If jumper J34 is installed, the PCI bus will operate at 33Mhz regardless of
the status of the M66En signal. The PCI bus ordinarily selects 66MHz operation
if (and only if) all PPMC and PCI devices installed support 66MHz clock rates;
otherwise, the slower 33MHz rate is used. However, for testing purposes,
this jumper may be used to evaluate slower bus clock rates. In addition,
it may be needed for systems using the 66MHz-capable cards which also wish
to use the Winbond or on-board I/O. Since these devices operate at 33Mhz
only, and yet do not have an M66En pin to control clock selection, jumper J34
is required to force the PCI bus to operate at 33MHz.
Note that the default VxWorks kernel configuration uses the on-board COM1
port for console I/O and therefore requires jumper J34 installed.
.SS "VIO Selection Jumpers"
Jumpers J30, J31, and J32 are used to set the I/O voltage signaling level
for the PPMC card. As with PCI slots, the PPMC slot provides the ability to
provide I/O on certain pins, and compatibility is maintened using keying
methods (for PCI slots, a key is present in the slot, while for PPMC slots,
a keying pin protrudes from the motherboard into the PPMC card). For
flexibility in testing purposes, Sandpoint allows any types of VIO-Keyed
board to be installed, with the proper VIO selected by jumper J30-J32.
.SS "Interrupt Inversion Switch (S5)"
Some PPMC cards, such as the PMC8240, are configured with active-high
interrupt input when operated in the default configuration, which conflicts
with PCI requirements. This is one example in which the MPC-8240 is not
quite identical to an MPC603 + MPC106, so software moved as-is from the
yellowknife to the PPMC8240 will find interrupts not to be working. The short
term work around is to configure Sandpoint to invert the PMC interrupt
signal; since this violates the specs, if intended only for a short term
assistance, the correct solution is to program the EPIC of the MPC8240
to accept the correct polarity.
.SS "Shared interrupt Selection Switch (S6)"
PPMC cards support four interrupt sources. When operating in modes 0 or 1,
there are total five possible interrupt sources. When on board I/O is needed,
it must share with or replace PCI devices in slot 2 or slot 3. Software
must poll multiple sources to determine interrupt sources if both the slot
and local I/O are needed; othewise, the slot can be left unused or used with
non interrupting devices such as graphics cards. For default operation with
vxWorks S6 should be set in a position towards the PPMC module so that it
shares Winbond IRQ with slot 2.
.SS "Mode Selection Swithes (S3,S4)"
Switches S3 and S4 should be set for mode 1. For this S3 should be
in a position towards the PPMC module and S4 should be in a position away
from the PMC module. The PPMC slot is the system controller and provides
arbitration and interrupt control. The Winbond IDE disk controllers replace
slots 1 and 2 (3.3V PCI slots). The 5V PCI slots 3 and 4 are available.
The on-board I/O shares interrupts with slot 2 or 3.
.SS "SP3 Switches"
.sp .4
SNo.| Switch | Function | Mode used
_
1 | S1 | ROMSEL | Primary ROM (29F040) is used for PCI boot option.
2 | S1 | ROM1WP | ROM1 may be read to or written from.
3 | S1 | Reserved | Reserved, has no function.
4 | S1 | FRCPCI33 | Force 33 MHz PCI Only.
5 | S1 | EXTCLK | Normal Clock Mode.
6 | S1 | SSCLK | Normal PCI Clocks.
7 | S1 | SSRNG | -3.75% modulation (Has relevance only if SW1-6 is OFF.
8 | S1 | PSON | Force Power ON always.
.sp .4
SNo.| Switch | Function | Mode used
_
1-2 | S2 | AMODE | FULL
3 | S2 | ILEGACY | Legacy Sandpoint 1/2 Interrupts Modes
4-5 | S2 | IMODE | Serial
6 | S2 | RMODE | ROM governs ROM/Flash access
7-8 | S2 | USER | User defined functions.
.SH "FEATURES"
The Sandpoint motherboard is a "host" board, which accepts a PMC or PPMC
card as well as having up to four PCI slots. The host board has the following
features:
.IP
One PMC slot with PPMC, 64-bit and 66MHz extensions
.IP
Switch-selectable operating modes
.IP
Four PCI slots: two 5V/32-bit slots, two 3.3V/64-bit slots
.IP
PCI slots support 33 or 66 MHz operation
.IP
Two standard 16650-compatible ESD-protected serial ports
.IP
IEEE 1284 parallel port
.IP
Floppy disk port
.IP
Two IDE ports
.IP
PS/2 Mouse and keyboard connectors
.IP
NVRAM and real-time clock (RTC)
.IP
Advanced Power Controller ("soft on/off)
.IP
LED monitors for critical functions
.IP
Automatic sense of PCI bus speed (33 or 66 MHz)
.IP
Flash EPROM for boot firmware
.IP
Serial - two RS232 9pin serial devices
.IP
System clock (PPC decrementer)
.IP
Winbond WB83C553 as PCI to ISA Bridge
.IP
Winbond WB83C553 as i8259 PIC
.IP
Winbond WB83C553 as ATA EIDE controller
.IP
Winbond WB83C553 as PS2 floppy disk controller
.IP
Winbond WB83C553 as i8254 auxiliary clock
.IP
DEC 21040 Ethernet Controller (PCI card)
.IP
DEC 21140 Ethernet Controller (PCI card)
.IP
DEC 21143 Ethernet Controller (PCI card)
.IP
Intel 82557 Ethernet Controller (PCI card)
.IP
Intel 82558 Ethernet Controller (PCI card)
.IP
Intel 82559 Ethernet Controller (PCI card)
.IP
AMD 79C970 Ethernet Controller (PCI card)
.IP
AMD 79C971 Ethernet Controller (PCI card)
.IP
AMD 79C972 Ethernet Controller (PCI card)
.IP
3Com 3C90x Ethernet Controller (PCI card)
.LP
.SS "Unsupported Features"
The I/O subsystem does not support the following devices:
.IP
Parallel Port
.IP
Keyboard and Mouse Ports
.IP
National Semiconductor SuperIO Real Time Clock
.IP
.SS "Feature Interactions"
None.
.SH "HARDWARE DETAILS"
This section documents the details of the device drivers and board
hardware elements.
.SS "Devices"
The chip drivers included are:
.CS
w83553PciIbc.c - interrupt controller driver
sysEpic.c - embedded interrupt controller driver
ns8730xSuperIo.c - super IO device support
i8250Sio.c - Intel 8250 UART driver
i8254AuxClk.c - i8254 timer library (auxiliary clock)
ppcDecTimer.c - PowerPC decrementer timer library (system clock)
byteNvRam.c - byte-oriented generic non-volatile RAM library
flashMem.c - 29F040 flash memory device driver.
pciConfigLib.c - PCI Configuration Space Access Library
pciConfigShow.c - PCI Configuration Space Display Library
pciIntLib.c - PCI Interrupt Support Library
pciAutoconfigLib.c - PCI Bus Auto-configuration Library
fdcDrv.c - driver for PS2 floppy device controller(FDC)
isaDma.c - I8237 ISA DMA transfer interface library
ataDrv.o - ATA/EIDE HDD driver
ataShow.o - ATA/EIDE HDD display
if_dc.o - DEC 21x4x Ethernet LAN network interface driver
dec21x40End.o - DEC 21x4x Ethernet LAN END driver
fei82557End.o - Intel 82557, 82558, 82559 END driver
ln97xEnd.o - AMD 79c97x END driver
El3c90xEnd.o - 3Com EtherLink 3C90x END driver
altiVecLib.c - AltiVec support
.CE
The user configurable options are in config.h.
.SS "Memory Maps"
.SS "CHRP Memory Model"
The following table describes the Sandpoint X2, using the CHRP
memory mapping.
While Sandpoint and the MPC107 also support PREP, CHRP is the only
model tested. The following is the CHRP mapping as it relates to
VxWorks.
.bS
VxWorks_rom Memory Image:
_______________________________________________________________
| | |
| | |
| VxWorks_rom | |
| | |
| | ROM_TEXT_ADRS 0xFFF0 0100 |
| | ROM_BASE_ADRS 0xFFF0 0000 |
|___________________|___________________________________________|
| | |
| | |
| Non allocated or | |
| uninstalled RAM | |
| | |
| Top of RAM | LOCAL_MEM_SIZE 0x0100 0000 |
|___________________|__________________________________________ |
| | |
| | |
| | |
| Zeroed out | |
| by boot code | |
| | |
| | |
| | |
| | |
|___________________|___________________________________________|
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