rtl81x9.c

cpc-1631的BSP包for VxWorks操作系统

*
* rtl81x9InitParse - parse parameter values from initString
*
* Parse the input string.  Fill in values in the driver control structure.
*
* The initialization string format is:
* "<device addr>:<PCI addr>:<ivec>:<ilevel>:<mem base>:<mem size>:	\
*  <user flags>:<offset>"
*
* .IP <device addr>
* base address of hardware device registers
* .IP <PCI addr>
* main memory address over the PCI bus
* .IP <ivec>
* interrupt vector number
* .IP <ilevel>
* interrupt level
* .IP <mem base>
* base address of a DMA-able, cache free,pre-allocated  memory
* .IP <mem size>
* size of the pre-allocated memory
* .IP <user flags>
* User flags control the run-time characteristics of the chip
* .IP <offset>
* Memory offset for alignment
* .LP
*
* RETURNS: OK or ERROR for invalid arguments.
*/

LOCAL STATUS rtl81x9InitParse
    (
    RTL81X9END_DEVICE *	pDrvCtrl,
    char *	initString
    )
    {
    char *		tok;
    /*char**      holder = NULL;*/
    char*      holder = NULL;	/* vicadd*/
    UINT32      devMemAddr;
    UINT32      devIoAddr;

    /* Parse the initString */

    DRV_LOG (DRV_DEBUG_LOAD, "Parse starting ...\n", 1, 2, 3, 4, 5, 6);

    /* Unit number. */

    tok = strtok_r (initString, ":", &holder);
    if (tok == NULL)
        return ERROR;

    pDrvCtrl->unit = atoi (tok);

    DRV_LOG (DRV_DEBUG_LOAD, "Unit : %d ...\n", pDrvCtrl->unit, 2, 3, 4, 5, 6);

    /* devAdrs address. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    devMemAddr = (UINT32) strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "devMemAddr : 0x%X ...\n", devMemAddr,
             2, 3, 4, 5, 6);

    /* devIoAddrs address */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    devIoAddr = (UINT32) strtoul (tok, NULL, 16);


    /* always use memory mapped IO if provided, else use io map */
    
    if ((devMemAddr == NONE) && (devIoAddr == NONE))
		{
        DRV_LOG (DRV_DEBUG_LOAD, "No memory or IO base specified ...\n",
                 1, 2, 3, 4, 5, 6);
        return (ERROR);
		}
    else if (devMemAddr != NONE)
        {
        pDrvCtrl->devAdrs = devMemAddr;
        pDrvCtrl->flags   |= RTL_FLG_MODE_MEM_IO_MAP;
        DRV_LOG (DRV_DEBUG_LOAD, "devMemAddr specified for devAdrs ...\n",
                 1, 2, 3, 4, 5, 6);
        }
    else
		{
        pDrvCtrl->devAdrs = devIoAddr;
        DRV_LOG (DRV_DEBUG_LOAD, "devIoAddr specified for devAdrs - 0x%X ...\n",
                 devIoAddr, 2, 3, 4, 5, 6);
		}
        
    /* PCI memory base address as seen from the CPU */
    
    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->pciMemBase = strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "Pci : 0x%X ...\n", pDrvCtrl->pciMemBase,
             2, 3, 4, 5, 6);

    /* Interrupt vector. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->ivec = atoi (tok);

    DRV_LOG (DRV_DEBUG_LOAD, "ivec : 0x%X ...\n", pDrvCtrl->ivec,
             2, 3, 4, 5, 6);

    /* Interrupt level. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->ilevel = atoi (tok);

    DRV_LOG (DRV_DEBUG_LOAD, "ilevel : 0x%X ...\n", pDrvCtrl->ilevel,
             2, 3, 4, 5, 6);

    /* Caller supplied memory address. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->memAdrs = (char *)strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "memAdrs : 0x%X ...\n", (int)pDrvCtrl->memAdrs,
             2, 3, 4, 5, 6);

    /* Caller supplied memory size. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->memSize = strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "memSize : 0x%X ...\n", pDrvCtrl->memSize,
             2, 3, 4, 5, 6);

    /* Caller supplied memory width. */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->memWidth = atoi (tok);

    DRV_LOG (DRV_DEBUG_LOAD, "memWidth : 0x%X ...\n", pDrvCtrl->memWidth,
             2, 3, 4, 5, 6);

    /* CSR3B value */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;
    pDrvCtrl->csr3B = strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "csr3b value : %d ...\n", pDrvCtrl->csr3B,
             2, 3, 4, 5, 6);

    /* Caller supplied alignment offset. */
    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
	return ERROR;
    pDrvCtrl->offset = atoi (tok);

    DRV_LOG (DRV_DEBUG_LOAD, "offset value : %d ...\n", pDrvCtrl->offset,
             2, 3, 4, 5, 6);

    /* caller supplied flags */

    tok = strtok_r (NULL, ":", &holder);
    if (tok == NULL)
        return ERROR;

    pDrvCtrl->flags |= strtoul (tok, NULL, 16);

    DRV_LOG (DRV_DEBUG_LOAD, "flags : 0x%X ...\n", pDrvCtrl->flags,
             2, 3, 4, 5, 6);

    return OK;
    }

/*******************************************************************************
*
* rtl81x9InitMem - initialize memory for the device
*
* Using data in the control structure, setup and initialize the memory
* areas needed.  If the memory address is not already specified, then allocate
* cache safe memory.
*
* RETURNS: OK or ERROR.
*
*/

LOCAL STATUS rtl81x9InitMem
    (
    RTL81X9END_DEVICE * 	pDrvCtrl	/* device to be initialized */
    )
    {
    UINT	sz = 0;           	/* temporary size holder */

    /***** Establish size of shared memory region we require *****/

    /*DRV_LOG (DRV_DEBUG_LOAD, "rtl81x9InitMem\n", 0, 0, 0, 0, 0, 0);*/

    if ((int) pDrvCtrl->memAdrs != NONE)  /* specified memory pool */
        {
        /*
         * With a specified memory pool we want to maximize
         * rtlRsize and rtlTsize
         */
		DRV_LOG (DRV_DEBUG_LOAD, "No memAdrs supplied\n", 0, 0, 0, 0, 0, 0); 

        sz = (pDrvCtrl->memSize - (RMD_SIZ + sizeof (rtl_ib)))
               / ((2 * RTL_BUFSIZ) + RMD_SIZ);

        sz >>= 1;               /* adjust for roundoff */

        for (rtlRsize = 0; sz != 0; rtlRsize++, sz >>= 1)
        	;

        }

    /* limit ring sizes to reasonable values */

    rtlRsize = max (rtlRsize, 2);		/* 4 Rx buffers is reasonable min */
    rtlRsize = min (rtlRsize, 7);		/* 128 Rx buffers is max for chip */

    /* Add it all up */

    sz = (((1 << rtlRsize) + 1) * RMD_SIZ) + IB_SIZ + 24;

    /*DRV_LOG (DRV_DEBUG_LOAD, "sx - %d\n",sz, 0, 0, 0, 0, 0); */


    /***** Establish a region of shared memory *****/

    /* OK. We now know how much shared memory we need.  If the caller
     * provides a specific memory region, we check to see if the provided
     * region is large enough for our needs.  If the caller did not
     * provide a specific region, then we attempt to allocate the memory
     * from the system, using the cache aware allocation system call.
     */

    switch ((int) pDrvCtrl->memAdrs)
        {
        default :       /* caller provided memory */
            if (pDrvCtrl->memSize < sz)     /* not enough space */
                {
    			DRV_LOG (DRV_DEBUG_LOAD, "rtl81x9: not enough memory provided need %ul got %d\n", 
                         						pDrvCtrl->memSize, sz, 0, 0, 0, 0);
                return (ERROR);
                }

	    	/* set the beginning of pool */

            pDrvCtrl->pShMem = pDrvCtrl->memAdrs;

            /* assume pool is cache coherent, copy null structure */

            pDrvCtrl->cacheFuncs = cacheNullFuncs;
    		DRV_LOG (DRV_DEBUG_LOAD, "Memory checks out\n",0, 0, 0, 0, 0, 0); 
            break;

        case NONE :     /* get our own memory */

            /* Because the structures that are shared between the device
             * and the driver may share cache lines, the possibility exists
             * that the driver could flush a cache line for a structure and
             * wipe out an asynchronous change by the device to a neighboring
             * structure. Therefore, this driver cannot operate with memory
             * that is not write coherent.  We check for the availability of
             * such memory here, and abort if the system did not give us what
             * we need.
             */

            if (!CACHE_DMA_IS_WRITE_COHERENT ())
                {
                DRV_LOG (DRV_DEBUG_LOAD, "rtl: device requires cache coherent memory\n", 0, 0, 0, 0, 0, 0);
                return (ERROR);
                }

            pDrvCtrl->pShMem = (char *) cacheDmaMalloc (sz);

            if ((int)pDrvCtrl->pShMem == NULL)
                {
                DRV_LOG (DRV_DEBUG_LOAD, "rtl: system memory unavailable\n", 0, 0, 0, 0, 0, 0);
                return (ERROR);
                }

            /* copy the DMA structure */

            pDrvCtrl->cacheFuncs = cacheDmaFuncs;

            break;
        }

    /*                        Turkey Carving
     *                        --------------
     *
     *                          LOW MEMORY
     *
     *             |----------------------------------------|
     *             |       The initialization block         |
     *             |         (sizeof (rtl_ib))              |
     *             |----------------------------------------|
     *             |         The Rx descriptors             |
     *             | ((1 << rtlRsize) + 1)*sizeof (RTL_RMD) |
     *             |----------------------------------------|
     */

    /* align */
    pDrvCtrl->pShMem = (char *) ( ( (int)pDrvCtrl->pShMem + 3) & ~3);

    /* Save some things */

    pDrvCtrl->memBase  = (char *)((ULONG)pDrvCtrl->pShMem & 0xff000000);

    if ((int) pDrvCtrl->memAdrs == NONE)
        pDrvCtrl->flags |= RTL_FLG_MEM_ALLOC_FLAG;

    /* first let's clear memory */

    bzero ((char *) pDrvCtrl->pShMem, (int) sz); 

    /* setup Rx memory pointers */

    pDrvCtrl->pRring      = (RTL_RMD *) ((int)pDrvCtrl->pShMem + IB_SIZ);
    pDrvCtrl->rringLen    = rtlRsize;
    pDrvCtrl->rringSize   = 1 << rtlRsize;

   	/* Allocate a chunk of memory for the Chip to place the Rx Buffers in */
	
	pDrvCtrl->ptrRxBufSpace = malloc (RTL_RXBUFLEN + 64);

	pDrvCtrl->ptrRxBufSpace += 4;

	if (pDrvCtrl->ptrRxBufSpace == NULL)
		{
		DRV_LOG (DRV_DEBUG_LOAD, "ptrRxBufSpace == NULL\n", 0, 0, 0, 0, 0, 0);
		return (ERROR);
		}

    pDrvCtrl->rmdNext = 0;

    /*
     * Allocate receive buffers from our own private pool.
     */
    if ((pDrvCtrl->end.pNetPool = malloc (sizeof(NET_POOL))) == NULL)
        return (ERROR);

    rtlMclConfig.mBlkNum = pDrvCtrl->rringSize * 2;
    rtlClDesc[0].clNum = pDrvCtrl->rringSize *2;
    rtlMclConfig.clBlkNum = rtlClDesc[0].clNum;

    rtlMclConfig.memSize = (rtlMclConfig.mBlkNum * (MSIZE + sizeof (long))) +
                          (rtlMclConfig.clBlkNum * (CL_BLK_SZ + sizeof(long)));

    if ((rtlMclConfig.memArea = (char *) memalign (sizeof(long),
                                                  rtlMclConfig.memSize))
        == NULL)
        return (ERROR);
    rtlClDesc[0].clNum = pDrvCtrl->rringSize *2;
    
    rtlClDesc[0].memSize = (rtlClDesc[0].clNum * (RTL_BUFSIZ + 8))
        + sizeof(int);

    if ((int) pDrvCtrl->memAdrs != NONE) /* Do we hand over our own memory? */
        {
        rtlClDesc[0].memArea = 
                (char *)(pDrvCtrl->pRring + (((1 << rtlRsize) + 1) * RMD_SIZ));
        }
    else
        {
        rtlClDesc[0].memArea =
            (char *) cacheDmaMalloc (rtlClDesc[0].memSize);
        if ((int)rtlClDesc[0].memArea == NULL)
            {
            DRV_LOG(DRV_DEBUG_LOAD,
                    "system memory unavailable\n", 1, 2, 3, 4, 5, 6);
            return (ERROR);
            }
        }

    if (netPoolInit(pDrvCtrl->end.pNetPool, &rtlMclConfig,
                    &rtlClDesc[0], rtlClDescNumEnt, NULL) == ERROR)
        {
    	DRV_LOG (DRV_DEBUG_LOAD, "Could not init buffering\n",0, 0, 0, 0, 0, 0); 
        return (ERROR);
        }
    /* Store the cluster pool id as others need it later. */
    pDrvCtrl->pClPoolId = clPoolIdGet(pDrvCtrl->end.pNetPool,
                                      RTL_BUFSIZ, FALSE);

    return OK;
    }

/*******************************************************************************
*
* rtl81x9Start - start the device
*
* This function initializes the device and calls BSP functions to connect
* interrupts and start the device running in interrupt mode.
*
* The complement of this routine is rtl81x9Stop.  Once a unit is reset by
* rtl81x9Stop, it may be re-initialized to a running state by this routine.
*
* RETURNS: OK if successful, otherwise ERROR
*/

LOCAL STATUS rtl81x9Start
    (
    RTL81X9END_DEVICE *	pDrvCtrl
    )
    {
    STATUS 	result;
	int		rxcfg;


    DRV_LOG (DRV_DEBUG_ALL, "RTL81x9 start\n",1 , 2, 3, 4, 5, 6);