📄 s3c6400_post_proc.c
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#include <windows.h>
#include <bsp_cfg.h>
#include <s3c6400.h>
#include "s3c6400_post_proc.h"
#include "s3c6400_post_proc_macro.h"
#ifdef REMOVE_BEFORE_RELEASE
#define POST_MSG(x)
#define POST_INF(x)
#define POST_ERR(x) RETAILMSG(TRUE, x)
#else
//#define POST_MSG(x) RETAILMSG(TRUE, x)
#define POST_MSG(x)
#define POST_INF(x) RETAILMSG(TRUE, x)
//#define POST_INF(x)
#define POST_ERR(x) RETAILMSG(TRUE, x)
//#define POST_ERR(x)
#endif
static volatile S3C6400_POST_REG *g_pPostReg = NULL;
static tPostConfig g_PostConfig;
POST_ERROR Post_initialize_register_address(void *pPostReg)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_initialize_register_address(0x%08x)\n\r"), pPostReg));
if (pPostReg == NULL)
{
POST_ERR((_T("[POST:ERR] Post_initialize_register_address() : NULL pointer parameter\n\r")));
error = POST_ERROR_NULL_PARAMETER;
}
else
{
g_pPostReg = (S3C6400_POST_REG *)pPostReg;
POST_INF((_T("[POST:INF] g_pPostReg = 0x%08x\n\r"), g_pPostReg));
}
memset((void *)(&g_PostConfig), 0x0, sizeof(tPostConfig));
POST_MSG((_T("[POST]--Post_initialize_register_address() : %d\n\r"), error));
return error;
}
POST_ERROR Post_initialize(POST_OP_MODE Mode, POST_SCAN_MODE Scan,
POST_SRC_TYPE SrcType, unsigned int SrcBaseWidth, unsigned int SrcBaseHeight, unsigned int SrcWidth, unsigned int SrcHeight,
unsigned int SrcOffsetX, unsigned int SrcOffsetY, POST_DST_TYPE DstType, unsigned int DstWidth, unsigned int DstHeight)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_initialize(%d, %d, %d, [%d, %d, %d, %d], %d, [%d, %d])\n\r"),
Mode, Scan, SrcType, SrcBaseWidth, SrcBaseHeight, SrcWidth, SrcHeight, SrcOffsetX, SrcOffsetY,
DstType, DstWidth, DstHeight));
error = Post_set_mode(Mode, Scan, SrcType, DstType);
if (error == POST_SUCCESS)
{
error = Post_set_source_size(SrcBaseWidth, SrcBaseHeight, SrcWidth, SrcHeight, SrcOffsetX, SrcOffsetY);
if (error == POST_SUCCESS)
{
error = Post_set_destination_size(DstWidth, DstHeight, DstWidth, DstHeight, 0, 0);
if (error == POST_SUCCESS)
{
error = Post_update_condition();
}
}
}
POST_MSG((_T("[POST]--Post_initialize() : %d\n\r"), error));
return error;
}
POST_ERROR Post_set_source_buffer(unsigned int AddrY, unsigned int AddrCb, unsigned int AddrCr)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_source_buffer(0x%08x, 0x%08x, 0x%08x)\n\r"), AddrY, AddrCb, AddrCr));
error = Post_set_dma_address(POST_SRC_ADDRESS, AddrY, AddrCb, AddrCr);
POST_MSG((_T("[POST]--Post_set_source_buffer() : %d\n\r"), error));
return error;
}
POST_ERROR Post_set_next_source_buffer(unsigned int AddrY, unsigned int AddrCb, unsigned int AddrCr)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_next_source_buffer(0x%08x, 0x%08x, 0x%08x)\n\r"), AddrY, AddrCb, AddrCr));
error = Post_set_dma_address(POST_NEXT_SRC_ADDRESS, AddrY, AddrCb, AddrCr);
POST_MSG((_T("[POST]--Post_set_next_source_buffer() : %d\n\r"), error));
return error;
}
POST_ERROR Post_set_destination_buffer(unsigned int AddrY, unsigned int AddrCb, unsigned int AddrCr)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_destination_buffer(0x%08x, 0x%08x, 0x%08x)\n\r"), AddrY, AddrCb, AddrCr));
if (g_PostConfig.DstType == POST_DST_FIFO_RGB888 || g_PostConfig.DstType == POST_DST_FIFO_YUV444)
{
POST_ERR((_T("[POST:ERR] Post_set_destination_buffer() : FIFO Mode does Not use DMA\n\r")));
error = POST_ERROR_ILLEGAL_PARAMETER;
}
else
{
error = Post_set_dma_address(POST_DST_ADDRESS, AddrY, AddrCb, AddrCr);
}
POST_MSG((_T("[POST]--Post_set_destination_buffer() : %d\n\r"), error));
return error;
}
POST_ERROR Post_set_next_destination_buffer(unsigned int AddrY, unsigned int AddrCb, unsigned int AddrCr)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_next_destination_buffer(0x%08x, 0x%08x, 0x%08x)\n\r"), AddrY, AddrCb, AddrCr));
if (g_PostConfig.DstType == POST_DST_FIFO_RGB888 || g_PostConfig.DstType == POST_DST_FIFO_YUV444)
{
POST_ERR((_T("[POST:ERR] Post_set_next_destination_buffer() : FIFO Mode does Not use DMA\n\r")));
error = POST_ERROR_ILLEGAL_PARAMETER;
}
else
{
error = Post_set_dma_address(POST_NEXT_DST_ADDRESS, AddrY, AddrCb, AddrCr);
}
POST_MSG((_T("[POST]--Post_set_next_destination_buffer() : %d\n\r"), error));
return error;
}
void Post_processing_start(void)
{
POST_MSG((_T("[POST]++Post_processing_start()\n\r")));
if (g_PostConfig.Mode == POST_FREE_RUN_MODE) // for FIFO output mode
{
g_pPostReg->MODE |= AUTOLOAD_ENABLE;
}
g_pPostReg->POSTENVID |= POST_ENVID;
POST_MSG((_T("[POST]--Post_processing_start()\n\r")));
}
POST_ERROR Post_processing_stop(void)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_processing_stop()\n\r")));
if (g_pPostReg->MODE & AUTOLOAD_ENABLE) // for FIFO output mode
{
// FIFO mode should be stopped by autoload disable
g_pPostReg->MODE &= ~AUTOLOAD_ENABLE;
g_pPostReg->POSTENVID &= ~POST_ENVID;
}
else
{
POST_ERR((_T("[POST:ERR] Post_processing_stop() : Free Run Mode Not Enabled\n\r")));
error = POST_ERROR_ILLEGAL_PARAMETER;
}
POST_MSG((_T("[POST]--Post_processing_stop() : %d\n\r"), error));
return error;
}
POST_STATE Post_get_processing_state(void)
{
POST_STATE state;
POST_MSG((_T("[POST]++Post_get_processing_state()\n\r")));
if (g_pPostReg->POSTENVID & POST_ENVID)
{
state = POST_BUSY;
}
else
{
state = POST_IDLE;
}
POST_MSG((_T("[POST]--Post_get_processing_state() = %d\n\r"), state));
return state;
}
void Post_enable_interrupt(void)
{
POST_MSG((_T("[POST]++Post_enable_interrupt()\n\r")));
g_PostConfig.bIntEnable = TRUE;
g_pPostReg->MODE &= ~POSTINT_PEND; // Pending Clear
g_pPostReg->MODE |= POSTINT_ENABLE; // Interrupt Enable
POST_MSG((_T("[POST]--Post_enable_interrupt()\n\r")));
}
void Post_disable_interrupt(void)
{
POST_MSG((_T("[POST]++Post_disable_interrupt()\n\r")));
g_PostConfig.bIntEnable = FALSE;
g_pPostReg->MODE &= ~POSTINT_ENABLE; // Interrupt Disable
g_pPostReg->MODE &= ~POSTINT_PEND; // Pending Clear
POST_MSG((_T("[POST]--Post_disable_interrupt()\n\r")));
}
BOOL Post_clear_interrupt_pending(void)
{
BOOL IntPend = FALSE;
POST_MSG((_T("[POST]++Post_clear_interrupt_pending()\n\r")));
if (g_pPostReg->MODE & POSTINT_PEND)
{
g_pPostReg->MODE &= ~POSTINT_PEND; // Pending Clear
IntPend = TRUE;
}
POST_MSG((_T("[POST]--Post_clear_interrupt_pending()\n\r")));
return IntPend;
}
static POST_ERROR Post_set_mode(POST_OP_MODE Mode, POST_SCAN_MODE Scan, POST_SRC_TYPE SrcType, POST_DST_TYPE DstType)
{
POST_ERROR error = POST_SUCCESS;
POST_MSG((_T("[POST]++Post_set_mode(%d, %d, %d, %d)\n\r"), Mode, Scan, SrcType, DstType));
g_PostConfig.Mode = Mode;
g_PostConfig.Scan = Scan;
g_PostConfig.SrcType = SrcType;
g_PostConfig.DstType = DstType;
//g_pPostReg->MODE = CLKVALUP_ALWAYS | CLKVAL_F(0) | CLKDIR_DIRECT | CLKSEL_F_HCLK | CSC_R2Y_WIDE | CSC_Y2R_WIDE | IRQ_LEVEL;
g_pPostReg->MODE = CLKVALUP_ALWAYS | CLKVAL_F(0) | CLKDIR_DIRECT | CLKSEL_F_HCLK | CSC_R2Y_NARROW | CSC_Y2R_NARROW | IRQ_LEVEL;
if (g_PostConfig.bIntEnable)
{
g_pPostReg->MODE |= POSTINT_ENABLE;
}
if (Mode == POST_PER_FRAME_MODE)
{
g_pPostReg->MODE |= AUTOLOAD_DISABLE;
}
else if (Mode == POST_FREE_RUN_MODE)
{
g_pPostReg->MODE |= AUTOLOAD_ENABLE;
}
else
{
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Operation Mode %d)\n\r"), Mode));
error = POST_ERROR_ILLEGAL_PARAMETER;
}
if (Scan == POST_PROGRESSIVE)
{
g_pPostReg->MODE |= PROGRESSIVE;
}
else if (Mode == POST_INTERLACE)
{
g_pPostReg->MODE |= INTERLACE;
}
else
{
POST_ERR((_T("[POST:ERR] Post_set_mode() : Unknown Scan Mode %d)\n\r"), Scan));
error = POST_ERROR_ILLEGAL_PARAMETER;
}
switch(SrcType)
{
case POST_SRC_RGB16:
g_pPostReg->MODE |= SRCFMT_RGB | SRCRGB_RGB565 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case POST_SRC_RGB24:
g_pPostReg->MODE |= SRCFMT_RGB | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE;
break;
case POST_SRC_YUV420:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV420 | SRC_NOT_INTERLEAVE;
break;
case POST_SRC_YUV422_YCBYCR:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCBYCR;
break;
case POST_SRC_YUV422_CBYCRY:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CBYCRY;
break;
case POST_SRC_YUV422_YCRYCB:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_YCRYCB;
break;
case POST_SRC_YUV422_CRYCBY:
g_pPostReg->MODE |= SRCFMT_YUV | SRCRGB_RGB24 | SRCYUV_YUV422 | SRC_INTERLEAVE | SRCYUV_CRYCBY;
break;
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