hwctxt.cpp

Samsung公司S3C6400芯片的BSP源码包

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.


Module Name:	HWCTXT.CPP

Abstract:		Platform dependent code for the mixing audio driver.

Notes:			The following file contains all the hardware specific code
				for the mixing audio driver.  This code's primary responsibilities
				are:

					* Initialize audio hardware (including codec chip)
					* Schedule DMA operations (move data from/to buffers)
					* Handle audio interrupts

				All other tasks (mixing, volume control, etc.) are handled by the "upper"
				layers of this driver.

				****** IMPORTANT ******
				For the S3C6400 CPU, DMA channel 2 can be used for both input and output.  In this,
				configuration, however, only one type operation (input or output) can execute.  In
				order to implement simultaneous playback and recording, two things must be done:

					1) Input DMA should be moved to DMA Channel 1; Output DMA still uses DMA Channel 2.
					2) Step #3 in InterruptThread() needs to be implemented so that the DMA interrupt
					   source (input DMA or output DMA?) can be determined.  The interrupt source needs
					   to be determined so that the appropriate buffers can be copied (Steps #4,#5...etc.).

				Lastly, the m_OutputDMAStatus and m_InputDMAStatus variables shouldn't need to be modified.
				The logic surrounding these drivers is simply used to determine which buffer (A or B) needs
				processing.

-*/

#include "wavemain.h"
#include <ceddk.h>
#include <bsp_cfg.h>
#include <s3c6400.h>
#include <DrvLib.h>
#include "WM8753.h"
#include <iic.h>
#include "s3c6400_iis_interface.h"
#include "s3c6400_dma_controller.h"
#include "hwctxt.h"

typedef enum
{
	DMA_CH_OUT	= 0x1,
	DMA_CH_IN		= 0x2
} DMA_CH_SELECT;

#ifdef	REMOVE_BEFORE_RELEASE
#define WAV_MSG(x)
#define WAV_INF(x)
#define WAV_ERR(x)	RETAILMSG(TRUE, x)
#else
//#define WAV_MSG(x)	RETAILMSG(TRUE, x)
#define WAV_MSG(x)
#define WAV_INF(x)	RETAILMSG(TRUE, x)
//#define WAV_INF(x)
#define WAV_ERR(x)	RETAILMSG(TRUE, x)
//#define WAV_ERR(x)
#endif

#define INTERRUPT_THREAD_PRIORITY_DEFAULT	(150)

#define CHIP_ID 						(0x34)		// WM8753 Chip ID
#define WM8753_READ				(CHIP_ID + 1)
#define WM8753_WRITE			(CHIP_ID + 0)

//#define RETAIL_ON	0

HardwareContext *g_pHWContext		= NULL;

static volatile S3C6400_IIS_REG		*g_pIISReg = NULL;
static volatile S3C6400_GPIO_REG	*g_pGPIOReg = NULL;
static volatile S3C6400_DMAC_REG	*g_pDMAC0Reg = NULL;
static volatile S3C6400_DMAC_REG	*g_pDMAC1Reg = NULL;
static volatile S3C6400_SYSCON_REG	*g_pSysConReg = NULL;

static DMA_CH_CONTEXT	g_OutputDMA;
static DMA_CH_CONTEXT	g_InputDMA;
static PHYSICAL_ADDRESS	g_PhyDMABufferAddr;

BOOL
HardwareContext::CreateHWContext(DWORD Index)
{
	if (g_pHWContext)
	{
		return(TRUE);
	}

	g_pHWContext = new HardwareContext;
	if (g_pHWContext == NULL)
	{
		return(FALSE);
	}

	return(g_pHWContext->Initialize(Index));
}

HardwareContext::HardwareContext()
: m_InputDeviceContext(), m_OutputDeviceContext()
{
	InitializeCriticalSection(&m_csLock);
	m_bInitialized = FALSE;
}


HardwareContext::~HardwareContext()
{
	DeleteCriticalSection(&m_csLock);
}


BOOL
HardwareContext::Initialize(DWORD Index)
{
	BOOL bRet;
	DWORD dwErr;

	if (m_bInitialized)
	{
		return(FALSE);
	}

	m_DriverIndex = Index;
	m_InPowerHandler = FALSE;

	m_bOutputDMARunning = FALSE;
	m_bInputDMARunning = FALSE;
	m_bSavedInputDMARunning = FALSE;
	m_bSavedOutputDMARunning = FALSE;
	m_InputDMAStatus	= DMA_CLEAR;
	m_OutputDMAStatus = DMA_CLEAR;
	m_nOutByte[OUTPUT_DMA_BUFFER0] = 0;
	m_nOutByte[OUTPUT_DMA_BUFFER1] = 0;
	m_nInByte[INPUT_DMA_BUFFER0] = 0;
	m_nInByte[INPUT_DMA_BUFFER1] = 0;

	m_dwSysintrOutput = NULL;
	m_dwSysintrInput = NULL;
	m_hOutputDMAInterrupt = NULL;
	m_hInputDMAInterrupt = NULL;
	m_hOutputDMAInterruptThread = NULL;
	m_hInputDMAInterruptThread = NULL;

	m_dwOutputGain = 0xFFFF;
	m_dwInputGain = 0xFFFF;
	m_bOutputMute = FALSE;
	m_bInputMute = FALSE;

	m_NumForcedSpeaker = 0;

	// Map Virtual Address for SFR
	bRet = MapRegisters();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : MapRegisters() Failed\n\r")));
		goto CleanUp;
	}

	// Allocation and Map DMA Buffer
	bRet = MapDMABuffers();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : MapDMABuffers() Failed\n\r")));
		goto CleanUp;
	}

	//Open handle to the I2C bus
	m_hI2C = CreateFile( L"IIC0:",
						GENERIC_READ|GENERIC_WRITE,
						FILE_SHARE_READ|FILE_SHARE_WRITE,
						NULL, OPEN_EXISTING, 0, 0);
	if ( m_hI2C == INVALID_HANDLE_VALUE )
	{
		dwErr = GetLastError();
		WAV_ERR((_T("[WAV:ERR] Initialize() : I2C0: Device Open Failed = 0x%08x\n\r"), dwErr));
		goto CleanUp;
	}

	// Enable Clock for IIS CH0
	// PCLK Case
	//g_pSysConReg->CLKSRC = (g_pSysConReg->CLKSRC & ~(0x7<<7)) | (0x /// ????? No config data for CLKSRC on F/W code.. WHY???
	g_pSysConReg->PCLK_GATE |= (1<<15);
	g_pSysConReg->SCLK_GATE |= (1<<8);

	// Initialize SFR address for PDD Library
	IIS_initialize_register_address((void *)g_pIISReg, (void *)g_pGPIOReg);
	DMA_initialize_register_address((void *)g_pDMAC0Reg, (void *)g_pDMAC1Reg, (void *)g_pSysConReg);

	// Initialize IIS interface
	IIS_initialize_interface();

	// Initialize Audio Codec
	bRet = InitIISCodec();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : InitIISCodec(() Failed\n\r")));
		goto CleanUp;
	}

	// Request DMA Channel and Initialize
	// DMA context have Virtual IRQ Number of Allocated DMA Channel
	// You Should initialize Interrupt after DMA initialization
	bRet = InitOutputDMA();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : InitOutputDMA() Failed\n\r")));
		goto CleanUp;
	}

	bRet = InitInputDMA();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : InitInputDMA() Failed\n\r")));
		goto CleanUp;
	}

	// Initialize Interrupt
	bRet = InitInterruptThread();
	if (bRet == FALSE)
	{
		WAV_ERR((_T("[WAV:ERR] Initialize() : InitInterruptThread() Failed\n\r")));
		goto CleanUp;
	}

	// Set HwCtxt Initialize Flag
	m_bInitialized = TRUE;

	//-----------------------------------------------
	// Power Manager expects us to init in D0.
	// We are normally in D4 unless we are opened for play.
	// Inform the PM.
	//-----------------------------------------------
	m_Dx = D0;
	DevicePowerNotify(_T("WAV1:"),(_CEDEVICE_POWER_STATE)D4, POWER_NAME);

CleanUp:

	return bRet;
}


BOOL
HardwareContext::Deinitialize()
{
	if (m_bInitialized)
	{
		DeinitInterruptThread();

		StopOutputDMA();
		StopInputDMA();
		DMA_release_channel(&g_OutputDMA);
		DMA_release_channel(&g_InputDMA);

		CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);

		UnMapDMABuffers();
		UnMapRegisters();
	}
	return TRUE;
}


void
HardwareContext::PowerUp()
{
	WAV_MSG((_T("[WAV] ++PowerUp()\n\r")));

	// Enable Clock for IIS CH0
	g_pSysConReg->PCLK_GATE |= (1<<15);
	g_pSysConReg->SCLK_GATE |= (1<<8);

	IIS_initialize_interface();

	//InitIIS();
	InitIISCodec();

	CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);

	WAV_MSG((_T("[WAV] --PowerUp()\n\r")));
}


void HardwareContext::PowerDown()
{
	WAV_MSG((_T("[WAV] ++PowerDown()\n\r")));

	CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);
	CodecPowerControl();

	// Disable Clock for IIS CH0
	g_pSysConReg->PCLK_GATE &= ~(1<<15);
	g_pSysConReg->SCLK_GATE &= ~(1<<8);

	// TODO: Someone power down Codec Chip...
}


DWORD
HardwareContext::Open(void)
{
	DWORD mmErr = MMSYSERR_NOERROR;
	DWORD dwErr;

	// Don't allow play when not on, if there is a power constraint upon us.
	if ( D0 != m_Dx )
	{
		// Tell the Power Manager we need to power up.
		// If there is a power constraint then fail.
		dwErr = DevicePowerNotify(_T("WAV1:"), D0, POWER_NAME);
		if ( ERROR_SUCCESS !=  dwErr )
		{
			WAV_ERR((_T("[WAV:ERR] Open() : DevicePowerNotify Error : %u\r\n"), dwErr));
			mmErr = MMSYSERR_ERROR;
		}
	}

	return mmErr;
}


DWORD
HardwareContext::Close(void)
{
	DWORD mmErr = MMSYSERR_NOERROR;
	DWORD dwErr;

	// we are done so inform Power Manager to power us down, 030711
	dwErr = DevicePowerNotify(_T("WAV1:"), (_CEDEVICE_POWER_STATE)D4, POWER_NAME);
	if ( ERROR_SUCCESS !=  dwErr )
	{
		WAV_ERR((_T("[WAV:ERR] Close() : DevicePowerNotify Error : %u\r\n"), dwErr));
		mmErr = MMSYSERR_ERROR;
	}

	return mmErr;
}


BOOL
HardwareContext::IOControl(
			DWORD  dwOpenData,
			DWORD  dwCode,
			PBYTE  pBufIn,
			DWORD  dwLenIn,
			PBYTE  pBufOut,
			DWORD  dwLenOut,
			PDWORD pdwActualOut)
{
	DWORD dwErr = ERROR_SUCCESS;
	BOOL  bRc = TRUE;

	UNREFERENCED_PARAMETER(dwOpenData);

	switch (dwCode)
	{
	//-----------------
	// Power Management
	//-----------------
	case IOCTL_POWER_CAPABILITIES:
		{
			PPOWER_CAPABILITIES ppc;

			if ( !pdwActualOut || !pBufOut || (dwLenOut < sizeof(POWER_CAPABILITIES)) )
			{
				bRc = FALSE;
				dwErr = ERROR_INVALID_PARAMETER;
				break;
			}

			ppc = (PPOWER_CAPABILITIES)pBufOut;

			memset(ppc, 0, sizeof(POWER_CAPABILITIES));

			// support D0, D4
			ppc->DeviceDx = 0x11;

			// no wake
			// no inrush

			// Report our nominal power consumption in uAmps rather than mWatts.
			ppc->Flags = POWER_CAP_PREFIX_MICRO | POWER_CAP_UNIT_AMPS;

			// REVIEW: Do we enable all these for normal playback?
			// D0: SPI + I2S + CODEC (Playback) + Headphone=
			//     0.5 mA + 0.5 mA + (23 mW, into BUGBUG ohms ) + (30 mW, into 32 ohms)
			//     500 uA + 500 uA + 23000 uA + 32000 uA
			ppc->Power[D0] = 56000;

			*pdwActualOut = sizeof(POWER_CAPABILITIES);
		}
		break;

	case IOCTL_POWER_SET:
		{
			CEDEVICE_POWER_STATE NewDx;

			if ( !pdwActualOut || !pBufOut || (dwLenOut < sizeof(CEDEVICE_POWER_STATE)) )
			{
				bRc = FALSE;
				dwErr = ERROR_INVALID_PARAMETER;
				WAV_ERR((_T("[WAV:ERR] CEDEVICE_POWER_STATE : Invalid Parameter\n\r")));
				break;
			}

			NewDx = *(PCEDEVICE_POWER_STATE)pBufOut;

			if ( VALID_DX(NewDx) )
			{
				// grab the CS since the normal Xxx_PowerXxx can not.
				switch ( NewDx )
				{
				case D0:
					if (m_Dx != D0)
					{
						m_Dx = D0;

						PowerUp();

						Lock();

#if	0		// TODO: Resume Input DMA after wake Up ?
						if (m_bSavedInputDMARunning)
						{
							m_bSavedInputDMARunning = FALSE;
							SetInterruptEvent(m_dwSysintrInput);
							//StartInputDMA();
						}
#endif

						if (m_bSavedOutputDMARunning)
						{
							m_bSavedOutputDMARunning = FALSE;
							SetInterruptEvent(m_dwSysintrOutput);
							//StartOutputDMA();
						}

						Unlock();
					}
					break;
				default:
					if (m_Dx != (_CEDEVICE_POWER_STATE)D4)
					{
						// Save last DMA state before Power Down
						m_bSavedInputDMARunning = m_bInputDMARunning;
						m_bSavedOutputDMARunning = m_bOutputDMARunning;

						m_Dx = (_CEDEVICE_POWER_STATE)D4;

						Lock();

						StopOutputDMA();
						StopInputDMA();

						Unlock();

						PowerDown();
					}
					break;
				}

				// return our state
				*(PCEDEVICE_POWER_STATE)pBufOut = m_Dx;

				WAV_INF((_T("[WAV:INF] IOCTL_POWER_SET -> [D%d]\n\r"), m_Dx));

				*pdwActualOut = sizeof(CEDEVICE_POWER_STATE);
			}
			else
			{
				bRc = FALSE;
				dwErr = ERROR_INVALID_PARAMETER;
			}
		}
		break;

	case IOCTL_POWER_GET:
		if ( !pdwActualOut || !pBufOut || (dwLenOut < sizeof(CEDEVICE_POWER_STATE)) )
		{
			bRc = FALSE;
			dwErr = ERROR_INVALID_PARAMETER;
			break;
		}

		*(PCEDEVICE_POWER_STATE)pBufOut = m_Dx;

		RETAILMSG(1, (TEXT("WAVEDEV: IOCTL_POWER_GET: D%u \r\n"), m_Dx));

		*pdwActualOut = sizeof(CEDEVICE_POWER_STATE);
		break;

	default:
		bRc = FALSE;
		dwErr = ERROR_INVALID_FUNCTION;
		DEBUGMSG (ZONE_FUNCTION, (TEXT(" Unsupported ioctl 0x%X\r\n"), dwCode));
		break;
	}

	if (!bRc)
	{
		SetLastError(dwErr);
	}

	return(bRc);
}


BOOL
HardwareContext::StartOutputDMA()
{
	ULONG OutputTransferred;

	//WAV_MSG((_T("[WAV] StartOutputDMA()\r\n")));

	if((m_bOutputDMARunning == FALSE) && (m_Dx == D0))
	{
		m_bOutputDMARunning = TRUE;
		m_nOutByte[OUTPUT_DMA_BUFFER0] = 0;
		m_nOutByte[OUTPUT_DMA_BUFFER1] = 0;

		m_nOutputBufferInUse = OUTPUT_DMA_BUFFER0;	// Start DMA with Buffer 0
		m_OutputDMAStatus = (DMA_DONEA | DMA_DONEB) & ~DMA_BIU;
		OutputTransferred = TransferOutputBuffer(m_OutputDMAStatus);

		if(OutputTransferred)
		{
			CodecPowerControl();					// Turn Output Channel
			CodecMuteControl(DMA_CH_OUT, FALSE);	// nmute Output Channel

			// IIS PCM output enable
			IIS_set_tx_mode_control(IIS_TRANSFER_NOPAUSE);

			// Output DMA Start
			DMA_set_channel_source(&g_OutputDMA, m_OutputDMABufferPhyPage[OUTPUT_DMA_BUFFER0], WORD_UNIT, BURST_1, INCREASE);
			DMA_set_channel_destination(&g_OutputDMA, IIS_get_output_physical_buffer_address(IIS_CH_0), WORD_UNIT, BURST_1, FIXED);
			DMA_set_channel_transfer_size(&g_OutputDMA, AUDIO_DMA_PAGE_SIZE);
			DMA_set_initial_LLI(&g_OutputDMA, 1);
			DMA_channel_start(&g_OutputDMA);

			IIS_set_active_on();
		}
		else
		{
			WAV_ERR((_T("[WAV:ERR] StartOutputDMA() : There is no data to transfer\r\n")));
			m_bOutputDMARunning = FALSE;
		}
	}
	else
	{
		//WAV_ERR((_T("[WAV:ERR] StartOutputDMA() : Output DMA is already running or m_Dx[%d] is not D0\r\n"), m_Dx));
		return FALSE;
	}

	return TRUE;
}


void
HardwareContext::StopOutputDMA()
{
	//WAV_MSG((_T("[WAV] StopOutputDMA()\r\n")));

	if (m_bOutputDMARunning)
	{
		m_OutputDMAStatus = DMA_CLEAR;

		// Stop output DMA
		DMA_channel_stop(&g_OutputDMA);

		// IIS PCM output disable
		IIS_set_tx_mode_control(IIS_TRANSFER_PAUSE);

		if (m_bInputDMARunning == FALSE) IIS_set_active_off();
	}

	m_bOutputDMARunning = FALSE;

	CodecMuteControl(DMA_CH_OUT, TRUE);
	CodecPowerControl();
}


BOOL
HardwareContext::StartInputDMA()