at4x0f.h

Sirf/Centrality公司GPS平台AtlasIII芯片AT640的Nboot源码

#define GPS_CH8_X                               (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0200))
#define GPS_CH9_X                               (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0240))
#define GPS_CH10_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0280))
#define GPS_CH11_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x02c0))
#define GPS_CH12_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0300))
#define GPS_CH13_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0340))
#define GPS_CH14_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0380))
#define GPS_CH15_X                              (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x03c0))
#define GPS_CTRL                                (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0400))
#define GPS_FIFO_CTRL                           (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0404))
#define GPS_FIFO_DATA                           (*(volatile DWORD *)(_GPS_MODULE_BASE + 0x0800))

/***************************************************************************************\
| Camera interface registers
\***************************************************************************************/
#define CAM_COUNT                               (*(volatile DWORD *)_CAM_MODULE_BASE)
#define CAM_YINT                                (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0004))
#define CAM_START                               (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0008))
#define CAM_END                                 (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x000c))
#define CAM_CTRL                                (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0010))
#define CAM_PIXEL_SHIFT                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0014))
#define CAM_YUV_COEF1                           (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0018))
#define CAM_YUV_COEF2                           (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x001c))
#define CAM_YUV_COEF3                           (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0020))
#define CAM_YUV_OFFSET                          (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0024))
#define CAM_INT_EN                              (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0028))
#define CAM_INT_CTRL                            (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x002c))
#define CAM_VSYNC_CTRL                          (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0030))
#define CAM_HSYNC_CTRL                          (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0034))
#define CAM_PXCLK_CTRL                          (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0038))
#define CAM_VSYNC_HSYNC                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x003c))
#define CAM_TIMING_CTRL                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0040))
#define CAM_DMA_IO_CTRL                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0044))
#define CAM_DMA_IO_LEN                          (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0048))
#define CAM_FIFO_CTRL                           (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x004c))
#define CAM_FIFO_LEVEL_CHK                      (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0050))
#define CAM_FIFO_OP_REG                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0054))
#define CAM_FIFO_STATUS_REG                     (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0058))
#define CAM_RXFIFO_DATA                         (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x005c))

/***************************************************************************************\
| I2C interface registers
\***************************************************************************************/
#define I2C_CLK                                 (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0080))
#define I2C_SAR                                 (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0084))
#define I2C_DBR                                 (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0088))
#define I2C_SR                                  (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x008c))
#define I2C_CR                                  (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0090))
#define I2C_IO_CTRL                             (*(volatile DWORD *)(_CAM_MODULE_BASE + 0x0094))

/***************************************************************************************\
| USBOTG interface registers
\***************************************************************************************/
#define USBOTG_ETD_BASE                         (_USBOTG_MODULE_BASE + 0x200)
#define USBOTG_EP_BASE                          (_USBOTG_MODULE_BASE + 0x400)
#define USBOTG_DATA_BASE                        (_USBOTG_MODULE_BASE + 0x1000)
#define _USBDMA_MODULE_BASE                     (_USBOTG_MODULE_BASE + 0x800)

  // Top Level, Core Registers
#define USBOTG_TL_HW_MODE_ADDR              (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x0*4))
#define USBOTG_TL_INT_STATUS_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1*4))
#define USBOTG_TL_INT_ENABLES_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x2*4))
#define USBOTG_TL_CLK_CTRL_ADDR             (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3*4))
#define USBOTG_TL_RST_CTRL_ADDR             (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x4*4))
#define USBOTG_TL_FRM_INTERVAL_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x5*4))
#define USBOTG_TL_FRM_BITWIDTH_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x6*4))
#define USBOTG_MNP_CTRL_ADDR                (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x7*4))
#define USBOTG_MNP_TIMER1_ADDR              (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x8*4))
#define USBOTG_MNP_TIMER2_ADDR              (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x9*4))
#define USBOTG_MNP_PULSE_ADDR               (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0xa*4))
#define USBOTG_MNP_INTERRUPT_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0xb*4))
#define USBOTG_MNP_INTERRUPT_ENABLES_ADDR   (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0xc*4))

  // Function Registers
#define USBOTG_FC_CMD_STATUS_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x10*4))
#define USBOTG_FC_DEV_ADDRESS_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x11*4))
#define USBOTG_FC_SYS_INT_STATUS_ADDR      (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x12*4))
#define USBOTG_FC_SYS_INT_EN_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x13*4))
#define USBOTG_FC_X_INT_STATUS_ADDR        (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x14*4))
#define USBOTG_FC_Y_INT_STATUS_ADDR        (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x15*4))
#define USBOTG_FC_BUF_INT_EN_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x16*4))
#define USBOTG_FC_X_STATUS_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x17*4))
#define USBOTG_FC_Y_STATUS_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x18*4))
#define USBOTG_FC_EP_ENABLES_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x19*4))
#define USBOTG_FC_EP_READY_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1a*4))
#define USBOTG_FC_IMM_INT_ADDR             (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1b*4))
#define USBOTG_FC_DONE_REG_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1c*4))
#define USBOTG_FC_DONE_REG_EN_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1d*4))
#define USBOTG_FC_TOGGLE_BITS_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1e*4))
#define USBOTG_FC_FM_NUMBER_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x1f*4))

// Host Controller Registers
#define USBOTG_HC_CONTROL_ADDR             (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x20*4))
#define USBOTG_HC_SYS_INT_STATUS_ADDR      (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x22*4))
#define USBOTG_HC_SYS_INT_ENABLES_ADDR     (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x23*4))
#define USBOTG_HC_ETD_X_INT_STATUS_ADDR    (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x26*4))
#define USBOTG_HC_ETD_Y_INT_STATUS_ADDR    (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x27*4))
#define USBOTG_HC_ETD_INT_ENABLES_ADDR     (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x28*4))
#define USBOTG_HC_X_STATUS_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x2A*4))
#define USBOTG_HC_Y_STATUS_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x2B*4))
#define USBOTG_HC_ETD_STATUS_ADDR          (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x30*4))
#define USBOTG_HC_ETD_DISABLE_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x31*4))
#define USBOTG_HC_DIRECT_RT_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x32*4))
#define USBOTG_HC_IMM_INT_ADDR             (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x33*4))
#define USBOTG_HC_DONE_REG_ADDR            (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x34*4))
#define USBOTG_HC_DONE_REG_EN_ADDR         (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x35*4))
#define USBOTG_HC_FM_NUMBER_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x38*4))
#define USBOTG_HC_LS_THRESHOLD_ADDR        (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x39*4))
#define USBOTG_HC_RH_DESC_A_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3A*4))
#define USBOTG_HC_RH_DESC_B_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3B*4))
#define USBOTG_HC_RH_STATUS_ADDR           (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3C*4))
#define USBOTG_HC_RH_PORT_STATUS_OTG_1_ADDR    (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3D*4))
#define USBOTG_HC_RH_PORT_STATUS_2_ADDR    (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3E*4))
#define USBOTG_HC_RH_PORT_STATUS_3_ADDR    (*(volatile DWORD *)(_USBOTG_MODULE_BASE + 0x3F*4))

// DMA controller Registers
#define USBOTG_DMA_REVCODE_ADDR             (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x00*4))
#define USBOTG_DMA_INTSTAT_ADDR             (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x01*4))
#define USBOTG_DMA_INTENABLE_ADDR           (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x02*4))
#define USBOTG_DMA_ETDERRSTAT_ADDR          (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x03*4))
#define USBOTG_DMA_EPERRSTAT_ADDR           (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x04*4))
#define USBOTG_DMA_ETDENABLE_ADDR           (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x08*4))
#define USBOTG_DMA_EPENABLE_ADDR            (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x09*4))
#define USBOTG_DMA_ETDTRIGX_ADDR            (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0a*4))
#define USBOTG_DMA_EPTRIGX_ADDR             (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0b*4))
#define USBOTG_DMA_ETDTRIGXY_ADDR           (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0c*4))
#define USBOTG_DMA_EPTRIGXY_ADDR            (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0d*4))
#define USBOTG_DMA_ETDBURST4EN_ADDR         (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0e*4))
#define USBOTG_DMA_EPBURST4EN_ADDR          (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x0f*4))
#define USBOTG_DMA_MISCCTRL_ADDR            (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x10*4))
#define USBOTG_DMA_ETDCLEAR_ADDR            (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x12*4))
#define USBOTG_DMA_EPCLEAR_ADDR             (*(volatile DWORD *)(_USBDMA_MODULE_BASE + 0x13*4))

#define USBOTG_DMA_ETDSMSA_SPACE            (_USBDMA_MODULE_BASE + 0x100)
#define USBOTG_DMA_EPSMSA_SPACE             (_USBDMA_MODULE_BASE + 0x180)
#define USBOTG_DMA_ETDBUFPTR_SPACE          (_USBDMA_MODULE_BASE + 0x200)
#define USBOTG_DMA_EPBUFPTR_SPACE           (_USBDMA_MODULE_BASE + 0x280)


/***************************************************************************************\
| PCMCIA interface registers
\***************************************************************************************/
#define PCMCIA_PCARD_ADDR           (*(volatile DWORD *)(_PCMCIA_MODULE_BASE))
#define PCMCIA_SDRAM_ADDR           (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x0004))
#define PCMCIA_DMA_LENGTH           (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x0008))
#define PCMCIA_DMA_CONTROL          (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x000c))
#define PCMCIA_STATUS               (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x0010))
#define PCMCIA_STOP                 (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x0014))
#define PCMCIA_INT_MASK             (*(volatile DWORD *)(_PCMCIA_MODULE_BASE + 0x0018))

/***************************************************************************************\
| Security Disk interface registers (arasan version SD MEM&IO)
\***************************************************************************************/

#define SD_SYS_ADDR                 (*(volatile DWORD *)(_SD_MODULE_BASE))
#define SD_BLK_PA