cachesync.h

Sirf/Centrality公司GPS平台AtlasIII芯片AT640的Nboot源码

//
// Copyright (c) Centralty Communications Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Module Name:	CacheSync.h

Abstract:		  
-----------------------------------------------------------------------------*/

#include "def.h"

#define CACHE_LINES_PER_SET_BITS(_cdata_)	(((_cdata_)>>3) & 7)
#define CACHE_LINE_SIZE_BITS(_cdata_)		((_cdata_)      & 3)
#define CACHE_M(_cdata_)					(((_cdata_)>>2) & 1)
#define CACHE_SIZE_BITS(_cdata_)			(((_cdata_)>>6) & 7)

// Extract the info from the DCache field (bits 23-12)   // 0x192 (0x0001,1001,0010) for ARM926EJ-S
#define DCACHE_FIELD						(dwCacheInfo >> 12)
#define DCACHE_LINES_PER_SET_BITS			CACHE_LINES_PER_SET_BITS(DCACHE_FIELD)
#define DCACHE_LINES_PER_SET				((2+CACHE_M(DCACHE_FIELD)) << (DCACHE_LINES_PER_SET_BITS-1))
#define DCACHE_LINE_SIZE					(1<<(CACHE_LINE_SIZE_BITS(DCACHE_FIELD)+3))
#define DCACHE_SETS							(1<<(CACHE_SIZE_BITS(DCACHE_FIELD)+6-DCACHE_LINES_PER_SET_BITS-CACHE_LINE_SIZE_BITS(DCACHE_FIELD)))

// Extract the info from the ICache field (bits 12-0)
#define ICACHE_FIELD						(dwCacheInfo)
#define ICACHE_LINE_SIZE					(1 << (CACHE_LINE_SIZE_BITS(ICACHE_FIELD)+3))

#define MMU_PAGE_SIZE						4096

#ifdef __cplusplus
extern "C" {
#endif
	extern void ARMFlushDCache(DWORD, DWORD, DWORD, DWORD);
	extern void ARMFlushDCacheLines(void*, DWORD, DWORD);
#ifdef __cplusplus
}
#endif


extern void CacheRangeFlush(PVOID pAddr, DWORD dwLen, DWORD dwFlag);