xipclk.s

来自「Sirf/Centrality公司GPS平台AtlasIII芯片AT640的Nb」· S 代码 · 共 51 行

	INCLUDE at4x0f.inc


	EXPORT XipClkSwitch

    ;
    ; XipClkSwitch
    ; parameters:
    ;		r0 -> pwr_pll1_config register value to be set
    ;		r1 -> pwr_clk_ratio register value to be set
    ; return: none
    ;
	AREA	XipClkSwitch, CODE, READONLY

    ;
    ; Config Power Manager Registers
    ;

    ldr r2, =PWRMGR_BASE

	; switch to XTAL first
	ldr r3, [r2, #PWR_CLK_SWITCH_OFFSET]
	cmp r3, #0
	beq %f25

    mov r3, #0
    str r3, [r2, #PWR_CLK_SWITCH_OFFSET]

    mov r3, #100
20
    subs r3, r3, #1
    bgt  %B20

25
    str r0, [r2, #PWR_PLL1_CONFIG_OFFSET]
    str r1, [r2, #PWR_CLK_RATIO_OFFSET]

    mov r3, #1000
30
    subs r3, r3, #1
    bgt  %B30

    ldr r3, =SYS_CS_PLL1
    str r3, [r2, #PWR_CLK_SWITCH_OFFSET]

	bx	lr

    END