📄 vectors.s
字号:
;
; Copyright (c) 2002 Palmmicro Communications Inc. All rights reserved.
;
; --------------------------------------------------------------------
; Module Name:
;
; vectors.s
;
; Abstract:
;
; These exception vectors and dummy exception handlers will be
; relocated at start-up from FLASH to 32bitRAM at address 0
;
AREA Vect, CODE, READONLY
ENTRY
; *****************
; Exception Vectors
; *****************
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
LDR PC, Prefetch_Addr
LDR PC, Abort_Addr
NOP ; Reserved vector
LDR PC, IRQ_Addr
LDR PC, FIQ_Addr
IMPORT Start_Boot ; In boot.s
IMPORT Irq_Handler ; In test.c
IF :DEF:FIQ_ENABLE
IMPORT Fiq_Handler ; In test.c
ENDIF
Reset_Addr DCD Start_Boot
Undefined_Addr DCD Undefined_Handler
SWI_Addr DCD SWI_Handler
Prefetch_Addr DCD Prefetch_Handler
Abort_Addr DCD Abort_Handler
DCD 0 ; Reserved vector
IRQ_Addr DCD Irq_Handler
FIQ_Addr DCD Fiq_Handler
; ************************
; Dummy Exception Handlers
; ************************
; The following handlers do not do anything useful in this example.
; They are set up here for completeness.
Undefined_Handler
B Undefined_Handler
SWI_Handler
B SWI_Handler
Prefetch_Handler
B Prefetch_Handler
Abort_Handler
B Abort_Handler
IF :DEF: FIQ_ENABLE
ELSE
Fiq_Handler
B Fiq_Handler
ENDIF
END
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -