cmos.lst

A Programmer s Reference to BIOS, DOS, and Third-Party Calls

Bitfields for AMI wait state configuration:
Bit(s)	Description	(Table C0053)
 7-6	IOR/IOW Wait states
 5-4	16-bit DMA Wait States
 3-2	8-bit DMA Wait States
 1	EMR bit
 0	DMA Clock Source
----------R4243------------------------------
CMOS 42h-43h - ???
----------R4244------------------------------
CMOS 42h-44h - AWARD - ??? chipset setup ???
----------R44--------------------------------
CMOS 44h - AMI - NMI CONTROL

Bitfields for AMI NMI control:
Bit(s)	Description	(Table C0054)
 4	NMI Power Fail Warning
 3	NMI Local Bus Timeout
----------R45--------------------------------
CMOS 45h - AMI - BUS DELAYS

Bitfields for AMI bus delays:
Bit(s)	Description	(Table C0055)
 7-6	AT Bus 32-Bit Delay
 5-4	AT Bus 16-Bit Delay
 3-2	AT Bus 8-Bit Delay
 1-0	AT Bus I/O Delay
SeeAlso: #C0058
----------R45--------------------------------
CMOS 45h - AMI (Saturn) - CACHE TAGS
SeeAlso: CMOS 46h"Saturn"

Bitfields for AMI (Saturn) cache tags:
Bit(s)	Description	(Table C0056)
 7	base memory 640K instead of 512K
 4-3	external cache tag width
	00 8 bits
	01 9 bits
	10 7 bits
	11 7 bits
----------R45--------------------------------
CMOS 45h - AWARD - Motherboard Chipset (SiS 85C501/85C502 shown)

Bitfields for AWARD motherboard chipset:
Bit(s)	Description	(Table C0057)
 7	System BIOS Cacheable (Default: 1=enabled)
 6	Video BIOS Cacheable  (Default: 1=enabled)
 5-0	???
----------R46--------------------------------
CMOS 46h - AMI - BUS WAIT STATES

Bitfields for AMI bus wait states:
Bit(s)	Description	(Table C0058)
 7-6	AT Bus 32 Bit Wait States
 5-4	AT Bus 16 Bit Wait States
 3-2	AT Bus	8 Bit Wait States
 1-0	AT Bus Clock Source
SeeAlso: #C0055
----------R46--------------------------------
CMOS 46h - AMI (Saturn) - SHADOW RAM CONTROL 1

Bitfields for AMI (Saturn) shadow RAM control 1:
Bit(s)	Description	(Table C0059)
 7-6	D000h-D3FFh shadow RAM
	00 don't shadow
	01 absent
	10 shadow
	11 reserved
 5-4	CC00h-CFFFh shadow RAM (as for D000h-D3FFh)
 3-2	C800h-CBFFh shadow RAM (as for D000h-D3FFh)
 1-0	C000h-C7FFh shadow RAM (as for D000h-D3FFh)
SeeAlso: #C0060
----------R4647------------------------------
CMOS 46h-47h - AWARD - ??? chipset setup ???
----------R47--------------------------------
CMOS 47h - AMI (Saturn) - SHADOW RAM CONTROL 2

Bitfields for AMI (Saturn) shadow RAM control 2:
Bit(s)	Description	(Table C0060)
 7-6	DC00h-DFFFh shadow RAM
	00 don't shadow
	01 absent
	10 shadow
	11 reserved
 5-4	D800h-DBFFh shadow RAM (as for DC00h-DFFFh)
 3-2	D400h-D7FFh shadow RAM (as for DC00h-DFFFh)
 0	PCI VGA palette snooping 
SeeAlso: #C0059
----------R4750------------------------------
CMOS 47h-50h - ???
----------R484F------------------------------
CMOS 48h-4Fh - AWARD - ??? unused ???  Defaults to all FFh's.
--------y-R484F------------------------------
CMOS 48h-4Fh - PhoenixBIOS A486 v1.01.E - USER PASSWORD
Desc:	stores scan-codes for the password in the first seven bytes, and the
	  low byte of the password checksum in the eighth byte
SeeAlso: CMOS 50h"A486 v1.01.E"
----------R48--------------------------------
CMOS 48h - AMI (Saturn) - EXTERNAL CACHE

Bitfields for AMI (Saturn) external cache:
Bit(s)	Description	(Table C0061)
 5	external cache write-back instead of write-through
----------R49--------------------------------
CMOS 49h - AMI (Saturn) - PERFORMANCE

Bitfields for AMI (Saturn) performance:
Bit(s)	Description	(Table C0062)
 1	DRAM enhanced performance mode
 0	ISA/DMA enhanced performance mode
SeeAlso: #C0063
----------R4A--------------------------------
CMOS 4Ah - AMI (Saturn) - BUS CONFIGURATION

Bitfields for AMI (Saturn) bus configuration:
Bit(s)	Description	(Table C0063)
 7	ISA enhanced performance mode
 6	ISA bus master installed
 5-4	PCI slot IRQ
	00 IRQ5
	01 IRQ9
	10 IRQ15
	11 IRQ15
 3	PCI on-board SCSI controller enabled
 1-0	ISA frame buffer
	00 disabled
	01 1MB at 15MB
	10 2MB at 14MB
	11 4MB at 12MB
SeeAlso: #C0062
----------R4B--------------------------------
CMOS 4Bh - AMI (Saturn) - ON-BOARD PERIPHERALS

Bitfields for AMI (Saturn) on-board peripherals:
Bit(s)	Description	(Table C0064)
 4	onboard FDC enabled
 0	onboard IDE enabled
----------R4C--------------------------------
CMOS 4Ch - AMI (Saturn) - PARALLEL PORT

Bitfields for AMI (Saturn) parallel port:
Bit(s)	Description	(Table C0065)
 4	IRQ active high
 3	parallel port extended mode
 1-0	parallel port address
----------R4C--------------------------------
CMOS 4Ch - AMI (PicoPower) - CLOCK SPEEDS

Bitfields for AMI (PicoPower) clock speeds:
Bit(s)	Description	(Table C0066)
 7-6	back-to-back I/O delay
	00  none
	01  1 SYSCLK
	10  2 SYSCLKs
	11  3 SYSCLKs
 5-3	Turbo clock select
	001 CLK2IN/3
	010 CLK2IN/4
	011 CLK2IN/5
	100 CLK2IN/6
	101 CLK2IN/7
	110 CLK2IN/8
	111 CLK2IN/9
 2-0	SYSCLK select (same as for Turbo clock select)
----------R4D--------------------------------
CMOS 4Dh - AMI (Saturn) - RESERVED
----------R4D--------------------------------
CMOS 4Dh - AMI (PicoPower) - MIDDLE BIOS
Note:	Middle BIOS is enabled if bit 1 set
--------y-R4D--------------------------------
CMOS 4Dh - AWARD - USER PASSWORD
SeeAlso: CMOS 4Eh"AWARD",CMOS 1Ch"AWARD"
----------R4E--------------------------------
CMOS 4Eh - AMI (Saturn) - SERIAL PORT

Bitfields for AMI (Saturn) serial port:
Bit(s)	Description	(Table C0067)
 7-5	serial port 1
 4-2	serial port 2
 0	manual programming mode
----------R4E--------------------------------
CMOS 4Eh - AMI (PicoPower) - TURBO BUS VIDEO

Bitfields for AMI (PicoPower) Turbo Bus video:
Bit(s)	Description	(Table C0068)
 2	memory enabled
 1	I/O enabled
--------y-R4E--------------------------------
CMOS 4Eh - AWARD - USER PASSWORD
SeeAlso: CMOS 4Dh"AWARD",CMOS 1Ch"AWARD"
----------R50--------------------------------
CMOS 50h - AWARD - PCI Bus Slot 1 Latency Timer 0-255 (default: 0)
--------y-R5057------------------------------
CMOS 50h-57h - PhoenixBIOS A486 v1.01.E - ADMIN PASSWORD
Desc:	stores scan-codes for the password in the first seven bytes, and the
	  low byte of the password checksum in the eighth byte
SeeAlso: CMOS 48h"A486 v1.01.E"
----------R51--------------------------------
CMOS 51h - AMI - MEMORY ACCESS CONTROL

Bitfields for AMI memory access control:
Bit(s)	Description	(Table C0069)
 7	Bank 0/1 RAS Precharge
 6	Bank 0/1 Access Wait States
 3-2	Bank 0/1 Wait States
----------R51--------------------------------
CMOS 51h - AWARD - PCI Bus Setup

Bitfields for AWARD PCI bus setup:
Bit(s)	Description	(Table C0070)
 7	PIRQ0# Interrupt Triggering
	0 = Edge Sensitive,
	1 = Level Sensitive
 6-2	??? Default: all 1's
 0-1	Slot 1 IRQ Setup
	00 = A-PIRQ0 (Default)
	01 = B-PIRQ1
	10 = C-PIRQ2
	11 = D-PIRQ3
----------R52--------------------------------
CMOS 52h - ???
----------R52--------------------------------
CMOS 52h - AWARD - PCI Bus Slot 2 Latency Timer 0-255 (default: 0)
----------R53--------------------------------
CMOS 53h - AMI - MEMORY ACCESS CONTROL

Bitfields for AMI memory access control:
Bit(s)	Description	(Table C0071)
 7	Bank 2/3 RAS Precharge
 6	Bank 2/3 Access Wait States
 3-2	Bank 2/3 Wait States
----------R53--------------------------------
CMOS 53h - AWARD - PCI Bus Setup

Bitfields for AWARD PCI bus setup:
Bit(s)	Description	(Table C0072)
 7	PIRQ1# Interrupt Triggering
	0 = Edge Sensitive,
	1 = Level Sensitive
 6-2	??? Default: all 1's
 0-1	Slot 2 IRQ Setup
	00 = A-PIRQ1 (Default)
	01 = B-PIRQ2
	10 = C-PIRQ3
	11 = D-PIRQ0
--------p-R53--------------------------------
CMOS 53h - AWARD v4.51PG APM - APM FUNCTION CONFIGURATION FOR ATX POWER SUPPLY
SeeAlso: CMOS 54h"v4.51PG"

Bitfields for AWARD v4.51PG ATX Power Supply Configuration #1:
Bit(s)	Description	(Table C0073)
 7	power button override enabled
 6-2	???
 1	VGA is active monitor
 0	???
SeeAlso: #C0074
----------R547F------------------------------
CMOS 54h-7Fh - ???
----------R54--------------------------------
CMOS 54h - AWARD - PCI Bus Slot 3 Latency Timer 0-255 (default: 0)
--------p-R54--------------------------------
CMOS 54h - AWARD v4.51PG APM - APM FUNCTION CONFIGURATION FOR ATX POWER SUPPLY
SeeAlso: CMOS 53h"v4.51PG"

Bitfields for AWARD v4.51PG ATX Power Supply Configuration #2:
Bit(s)	Description	(Table C0074)
 7-2	???
 1	enable Resume on Ring 
 0	enable Resume on Alarm
SeeAlso: #C0073
----------R55--------------------------------
CMOS 55h - AWARD - PCI Bus Setup

Bitfields for AWARD PCI bus setup:
Bit(s)	Description	(Table C0075)
 7	PIRQ2# Interrupt Triggering
	0 = Edge Sensitive,
	1 = Level Sensitive
 6-2	??? Default: all 1's
 0-1	Slot 3 IRQ Setup
	00 = A-PIRQ2 (Default)
	01 = B-PIRQ3
	10 = C-PIRQ0
	11 = D-PIRQ1
--------p-R55--------------------------------
CMOS 55h - AWARD v4.51PG - APM - POWER-ON DAY OF MONTH (Resume by Alarm)
Note:	value is binary, rather than BCD as for most calendar functions
SeeAlso: CMOS 56h"v4.51PG",CMOS 57h"v4.51PG"
----------R56--------------------------------
CMOS 56h - AWARD - ??? reserved for PCI Bus Slot 4 Latency Timer ???
--------p-R56--------------------------------
CMOS 56h - AWARD v4.51PG - APM - POWER-ON HOUR (Resume by Alarm)
Note:	value is binary, rather than BCD as for most calendar functions
SeeAlso: CMOS 55h"v4.51PG",CMOS 57h"v4.51PG"
----------R57--------------------------------
CMOS 57h - AWARD - PCI Bus Setup

Bitfields for AWARD PCI bus setup:
Bit(s)	Description	(Table C0076)
 7	PIRQ3# Interrupt Triggering
	0 = Edge Sensitive,
	1 = Level Sensitive
 6-0	???not used	Default: all 1's
--------p-R57--------------------------------
CMOS 57h - AWARD v4.51PG - APM - POWER-ON MINUTE (Resume by Alarm)
Note:	value is binary, rather than BCD as for most calendar functions
SeeAlso: CMOS 56h"v4.51PG",CMOS 58h"v4.51PG"
----------R58--------------------------------
CMOS 58h - AWARD - ??? reserved for PCI Bus Slot 5 Latency Timer ???

Bitfields for AWARD PCI bus slot 5 latency timer:
Bit(s)	Description	(Table C0077)
 3	onboard CMD IDE Mode 3
--------p-R58--------------------------------
CMOS 58h - AWARD v4.51PG - APM - POWER-ON SECOND (Resume by Alarm)
Note:	value is binary, rather than BCD as for most calendar functions
SeeAlso: CMOS 55h"v4.51PG",CMOS 57h"v4.51PG"
----------R59--------------------------------
CMOS 59h - AWARD - ??? reserved for PCI Bus Setup ???
----------R5A--------------------------------
CMOS 5Ah - AWARD - PCI Bus IRQ Setup 1

Bitfields for AWARD PCI bus IRQ setup 1:
Bit(s)	Description	(Table C0078)
 4-7	PIRQ1# Interrupt Line (0=none, Bh=IRQ11, etc)
 0-3	PIRQ0# Interrupt Line	  "	     "	      "
----------R5B--------------------------------
CMOS 5Bh - AWARD - PCI Bus IRQ Setup 2

Bitfields for AWARD PCI bus IRQ setup 2:
Bit(s)	Description	(Table C0079)
 4-7	PIRQ3# Interrupt Line (0=none, Bh=IRQ11, etc)
 0-3	PIRQ2# Interrupt Line	  "	     "	      "
----------R5C------------