gttimer_dy4.h

Curtiss-Wright Controls Embedded Computing公司的cw183板bsp源代码

/* gtTimer_dy4.h - header file for the MV-64x60 Counter/Timer driver */

/**************************************************************************
 *
 *   Copyright (c) 2005 Curtiss-Wright Controls, Inc. All rights
 *   reserved.  This Source Code is the Property of Curtiss-Wright
 *   Controls, Inc. and can only be used in accordance with Source
 *   Code License Agreement(s) of Curtiss-Wright Controls, Inc. or any
 *   of its subsidiaries.
 *
 **************************************************************************/

/*******************************************************************************
*                   Copyright 2002, GALILEO TECHNOLOGY, LTD.                   *
* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL.                      *
* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  *
* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        *
* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     *
* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       *
* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   *
*                                                                              *
* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL    *
* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K.  *
* (MJKK), GALILEO TECHNOLOGY LTD. (GTL) AND GALILEO TECHNOLOGY, INC. (GTI).    *
********************************************************************************/
/*
modification history
--------------------
01f,05dec05,tis         -add support for SCP-124
                        -rename Discovery_II directory to Discovery_III CR#12835.
01e,28sep05,asu         add support for CCA-149
01d,05may05,tis         add support for CCA_146
01c,01nov04,tis         add support for CCA_145
01b,09apr03,aak		integarte into 182 BSP
01a,20jan03,marvell     derrived from BSP DB-64360 Ver 1.2/0.2-I
*/

/*
DESCRIPTION:

 This file contains definitions and declarations  which provide complete interface
 to the counters and timers on the GT-64260 device.
 NOTE: Each counter/timer unit can function either as a counter or timer at a time.                 
 All counters/timers are 32 bit wide.                                        

INCLUDE FILES: core_dy4.h
*/

#ifndef __INCgtTimer_dy4h
#define __INCgtTimer_dy4h

/* includes */

#include <vxWorks.h>
#include "h/drv/dy4/boardName.h"
#if defined(SCP_124) || defined(VME_183)
#include "h/drv/discovery_III/gtCore_dy4.h"
#else
#include "h/drv/discovery_II/gtCore_dy4.h"
#endif /* defined(SCP_124) || defined(VME_183) */

#ifdef VME_182
#include "intCtrl182_dy4.h"
#endif

#ifdef CCA_145
#include "intCtrl145.h"
#endif

#ifdef CCA_146
#include "intCtrl146.h"
#endif

#ifdef CCA_149
#include "intCtrl149.h"
#endif

#ifdef VME_183
#include "intCtrl183.h"
#endif

#ifdef SCP_124
#include "intCtrl124.h"
#endif

#ifdef __cplusplus
extern "C" {
#endif

/* defines  */
#define CNTMR_FIRST       CNTMR_0

#ifdef INCLUDE_CNTMR_4_7
    #define CNTMR_LAST    CNTMR_7
#else
    #define CNTMR_LAST    CNTMR_3
#endif

#define GT_CNTMR0_READ(pData) GT_REG_READ(TIMER_COUNTER0, (pData))
#define GT_CNTMR1_READ(pData) GT_REG_READ(TIMER_COUNTER1, (pData))
#define GT_CNTMR2_READ(pData) GT_REG_READ(TIMER_COUNTER2, (pData))
#define GT_CNTMR3_READ(pData) GT_REG_READ(TIMER_COUNTER3, (pData))

#define GT_TMR0_READ	GT_CNTMR0_READ
#define GT_TMR1_READ	GT_CNTMR1_READ
#define GT_TMR2_READ	GT_CNTMR2_READ
#define GT_TMR3_READ	GT_CNTMR3_READ

/* Fast macros with no swapping to disable the counter timer */
#define GT_CNTMR0_DISABLE() (*(volatile unsigned int *)                        \
        (NONE_CACHEABLE(gtInternalRegBaseAddr) | TIMER_COUNTER_0_3_CONTROL)) = \
        (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |    \
        TIMER_COUNTER_0_3_CONTROL)) & 0xfeffffff

#define GT_CNTMR1_DISABLE() (*(volatile unsigned int *)                        \
        (NONE_CACHEABLE(gtInternalRegBaseAddr) | TIMER_COUNTER_0_3_CONTROL)) = \
        (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |    \
        TIMER_COUNTER_0_3_CONTROL)) & 0xfffeffff

#define GT_CNTMR2_DISABLE() (*(volatile unsigned int *)                        \
        (NONE_CACHEABLE(gtInternalRegBaseAddr) | TIMER_COUNTER_0_3_CONTROL)) = \
        (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |    \
        TIMER_COUNTER_0_3_CONTROL)) & 0xfffffeff

#define GT_CNTMR3_DISABLE() (*(volatile unsigned int *)                        \
        (NONE_CACHEABLE(gtInternalRegBaseAddr) | TIMER_COUNTER_0_3_CONTROL)) = \
        (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |    \
        TIMER_COUNTER_0_3_CONTROL)) & 0xfffffffe

#define IS_INVALID_CNTMR(countNum)                                             \
                      (((countNum) < CNTMR_FIRST) || (CNTMR_LAST < (countNum)))
#ifdef INCLUDE_CNTMR_4_7
    #define GT_CNTMR4_READ(pData) GT_REG_READ(TIMER_COUNTER4, (pData))
    #define GT_CNTMR5_READ(pData) GT_REG_READ(TIMER_COUNTER5, (pData))
    #define GT_CNTMR6_READ(pData) GT_REG_READ(TIMER_COUNTER6, (pData))
    #define GT_CNTMR7_READ(pData) GT_REG_READ(TIMER_COUNTER7, (pData))

    /* Fast macros with no swapping to disable the counter timer */
    #define GT_CNTMR4_DISABLE() (*(volatile unsigned int *)                    \
            (NONE_CACHEABLE(gtInternalRegBaseAddr) |                           \
            TIMER_COUNTER_4_7_CONTROL)) =                                      \
            (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |\
            TIMER_COUNTER_4_7_CONTROL)) & 0xfeffffff

    #define GT_CNTMR5_DISABLE() (*(volatile unsigned int *)                    \
            (NONE_CACHEABLE(gtInternalRegBaseAddr) |                           \
            TIMER_COUNTER_4_7_CONTROL)) =                                      \
            (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |\
            TIMER_COUNTER_4_7_CONTROL)) & 0xfffeffff

    #define GT_CNTMR6_DISABLE() (*(volatile unsigned int *)                    \
            (NONE_CACHEABLE(gtInternalRegBaseAddr) |                           \
            TIMER_COUNTER_4_7_CONTROL)) =                                      \
            (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |\
            TIMER_COUNTER_4_7_CONTROL)) & 0xfffffeff

    #define GT_CNTMR7_DISABLE() (*(volatile unsigned int *)                    \
            (NONE_CACHEABLE(gtInternalRegBaseAddr) |                           \
            TIMER_COUNTER_4_7_CONTROL)) =                                      \
            (*(volatile unsigned int *)(NONE_CACHEABLE(gtInternalRegBaseAddr) |\
            TIMER_COUNTER_4_7_CONTROL)) & 0xfffffffe

    #define GT_CNTMR_GET_BASE_CONTROL_REG(countNum) ((countNum) <= CNTMR_3)?   \
                                                    TIMER_COUNTER_0_3_CONTROL :\
                                                    TIMER_COUNTER_4_7_CONTROL

    #define GT_CNTMR_GET_BASE_REG(countNum)         ((countNum) <= CNTMR_3)?   \
                                                    TIMER_COUNTER0 :           \
                                                    TIMER_COUNTER4
#else
    #define GT_CNTMR_GET_BASE_CONTROL_REG(countNum)  TIMER_COUNTER_0_3_CONTROL
    #define GT_CNTMR_GET_BASE_REG(countNum)     TIMER_COUNTER0
#endif /* INCLUDE_CNTMR_4_7 */

/* typedefs */
typedef enum _cntmrNum      {CNTMR_0, CNTMR_1, CNTMR_2, CNTMR_3
#ifdef INCLUDE_CNTMR_4_7
                            ,CNTMR_4, CNTMR_5, CNTMR_6, CNTMR_7
#endif /* INCLUDE_CNTMR_4_7 */
                            } CNTMR_NUM;

typedef enum _cntmrOpModes  {COUNTER, TIMER, COUNTER_EXT_TRIG, TIMER_EXT_TRIG
                            } CNTMR_OP_MODES;

#define CNT_TMR_OP_MODES	CNTMR_OP_MODES

typedef enum cntmr_cause {
    CNTMR0_EXP = TIMER0,  /* Counter/Timer 0  interrupt event */
    CNTMR1_EXP = TIMER1,  /* Counter/Timer 1  interrupt event */
    CNTMR2_EXP = TIMER2,  /* Counter/Timer 2  interrupt event */
    CNTMR3_EXP = TIMER3   /* Counter/Timer 3  interrupt event */
	} CNTMR_CAUSE;

typedef enum _cntmrTctClocks {ONE_TCLK_CYC, TWO_TCLK_CYC} CNTMR_TCT_CLOCKS;

/*
 * Function prototypes
 */

/* Load an init Value to a given counter/timer */
bool gtTmrPeriodSet(CNTMR_NUM countNum, unsigned int value);

unsigned int gtTmrPeriodGet (CNTMR_NUM Num);

/* Set the Mode COUNTER/TIMER/EXTRIG to a given counter/timer */
bool gtTmrModeSet(CNTMR_NUM countNum, CNT_TMR_OP_MODES opMode);

/* Set the Enable-Bit to logic '1' ==> starting the counter. */
bool gtTmrEnable(CNTMR_NUM countNum);	            
/* Stop the counter/timer running, and returns its Value. */
unsigned int gtTmrDisable(CNTMR_NUM countNum);              

/* Returns the value of the given Counter/Timer */
unsigned int gtTmr(CNTMR_NUM countNum);
/* Combined all the sub-operations above to one function: Load,setMode,Enable */
bool gtTmrStart(CNTMR_NUM countNum,unsigned int countValue,
                  CNT_TMR_OP_MODES opMode);
bool gtTmrIsExpired(CNTMR_NUM countNum);

/* Get the MV64360 timerN clock frequency */

#define gtTmrFreq(Num) (GT64360_TMR_FREQ)

/*
 * Counter/Timer Interrupt Controller's API
 */ 
void    gtTmrInit (); 

STATUS  gtTmrIntConnect (CNTMR_CAUSE cause, VOIDFUNCPTR routine, int parameter, int prio);
STATUS  gtTmrIntDisable (CNTMR_CAUSE cause);
STATUS  gtTmrIntEnable (CNTMR_CAUSE cause);

#ifdef __cplusplus
}
#endif

#endif   /* __INCgtTimer_dy4h */