📄 sdmalow_dy4.h
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/* sdmaLow_dy4.h - Header File for low level definitions of SDMA facility *//************************************************************************** * * Copyright (c) 2005 Curtiss-Wright Controls, Inc. All rights * reserved. This Source Code is the Property of Curtiss-Wright * Controls, Inc. and can only be used in accordance with Source * Code License Agreement(s) of Curtiss-Wright Controls, Inc. or any * of its subsidiaries. * **************************************************************************//******************************************************************************** (c), Copyright 2001, Marvell International Ltd. ** THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL SEMICONDUCTOR, INC. ** NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT ** OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE ** DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. ** THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESS, IMPLIED ** OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. *********************************************************************************//*modification history--------------------01f,08dec05,tis rename Discovery_II directory to Discovery_III CR#12835.01e, jan05,dle CR kanata#247701d,02Nov02,deb PTR Add defines for SDMA config, Descriptor command status01c,02Nov02,deb PTR Reduce Number of Descriptors to 20, Increase HDLC bufs to 409601b,07may02,aak integrate into VME-181 BSP rel 1.001a,26sep01,marvell EV-64260A-BP BSP Version 2.2/1*/#ifndef _SDMA_LOW_H #define _SDMA_LOW_H/* includes */#include "h/drv/dy4/boardName.h"#if defined (SCP_124) || defined (VME_183)#include "h/drv/discovery_III/gtCore_dy4.h"#else#include "h/drv/discovery_II/gtCore_dy4.h"#endif /*SCP_124 *//* defines *//* this macros are used to define the tables of descriptors */ #define MPSC_PROTOCOL 0#define ETHERNET_PROTOCOL 1#define TX_START_OFFSET 14#define MAX_NUMBER_OF_RX_QUEUES 14#define MAX_NUMBER_OF_TX_QUEUES 8 #define MAX_NUMBER_OF_PORTS_QUEUES MAX_NUMBER_OF_RX_QUEUES+\ MAX_NUMBER_OF_TX_QUEUES#define CHANNELS_DIFFERENCE_OFFSETS 0x2000#define NUMBER_OF_SDMA_CHANNELS 2 /* this macros are used to control the amount and size of descriptors which allocated in demoApi.c file*/ /* RX */#define MIN_NUMBER_OF_UART_RX_DESC_ALLOC 20#define MIN_NUMBER_OF_ASYNC_RX_DESC_ALLOC 20 #define MIN_NUMBER_OF_HDLC_RX_DESC_ALLOC 20#define MIN_NUMBER_OF_MPSC_RX_DESC_ALLOC MIN_NUMBER_OF_HDLC_RX_DESC_ALLOC#define MAX_NUMBER_OF_HDLC_RX_DESC_ALLOC 10000#define MAX_NUMBER_OF_MPSC_RX_DESC_ALLOC MAX_NUMBER_OF_HDLC_RX_DESC_ALLOC#define MIN_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO0 200#define MAX_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO0 10000#define MIN_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO1 50#define MAX_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO1 10000#define MIN_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO2 50#define MAX_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO2 10000#define MIN_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO3 50#define MAX_NUMBER_OF_ETHERNET_RX_DESC_ALLOC_PRIO3 10000/* TX */#define MIN_NUMBER_OF_UART_TX_DESC_ALLOC 20#define MIN_NUMBER_OF_ASYNC_TX_DESC_ALLOC 4 #define MIN_NUMBER_OF_HDLC_TX_DESC_ALLOC 20#define MIN_NUMBER_OF_MPSC_TX_DESC_ALLOC MIN_NUMBER_OF_UART_TX_DESC_ALLOC#define MAX_NUMBER_OF_HDLC_TX_DESC_ALLOC 10000#define MAX_NUMBER_OF_MPSC_TX_DESC_ALLOC MAX_NUMBER_OF_HDLC_TX_DESC_ALLOC#define MIN_NUMBER_OF_ETHERNET_TX_DESC_ALLOC_PRIO0 1300#define MAX_NUMBER_OF_ETHERNET_TX_DESC_ALLOC_PRIO0 10000#define MIN_NUMBER_OF_ETHERNET_TX_DESC_ALLOC_PRIO1 2000#define MAX_NUMBER_OF_ETHERNET_TX_DESC_ALLOC_PRIO1 10000#define RX_DESC_ALIGN 0x10#define RX_BUFFER_ALIGN 0x10#define TX_DESC_ALIGN 0x10#define TX_BUFFER_ALIGN 0x10#define BUFFER_SIZE_FOR_HDLC 4096#define BUFFER_SIZE_FOR_UART 0x1#define BUFFER_SIZE_FOR_TX_ASYNC 4096#define BUFFER_SIZE_FOR_RX_ASYNC 0x1 #define BUFFER_SIZE_FOR_MPSC BUFFER_SIZE_FOR_UART#define BUFFER_SIZE_FOR_ETHERNET 2000 #define RX_DESCRIPTOR 0#define TX_DESCRIPTOR 1#define SHADOW_OWNER_BY_GT 1#define SHADOW_OWNER_BY_CPU 0 #define PRIO0 0 /* the lowest priority */#define PRIO1 1#define PRIO2 2#define PRIO3 3 /* the highest priority *//* this macros are used to enable access to SDMA_CONFIGURATION */#define RECEIVE_FIFO_THRESHOLD 1#define SINGLE_FRAME_MODE (1<<1)#define RETRANSMIT_COUNT_15 (0xf<<2)#define RX_LITTLE_ENDIAN (1<<6)#define RX_BIG_ENDIAN 0x0#define TX_LITTLE_ENDIAN (1<<7)#define TX_BIG_ENDIAN 0x0#define RXINT_FRAME (1<<9)#define BURST_SIZE_8 (3<<12)#define BURST_SIZE_4 (2<<12)#define BURST_SIZE_2 (1<<12)#define BURST_SIZE_1 0x0 /* this macros are used to enable access to MPSC_SDCMR */ #define ABORT_RECEIVE (1<<15)#define STOP_TRANSMIT (1<<16)#define ENABLE_RX_DMA (1<<7)#define TX_DEMAND (1<<23)#define ABORT_TRANSMIT (1<<31)/* this macros are used to enable access to RX_COMMAND & TX_COMMAND */ #define OWNER_BY_GT (1<<31)#define ENABLE_INTERRUPT (1<<23)#define FIRST (1<<17)#define LAST (1<<16)#define ERROR_SUMMARY (1<<15)#define PREAMBLE (1<<18)#define PADDING (1<<18)#define GENERATE_CRC (1<<22)#define ERR_RX_SHORT_FRAME (1<<8)#define ERR_RX_MAX_FRAME_LEN (1<<7)#define ERR_RX_OVERRUN (1<<6)#define ERR_RX_RESIDUE_1 (1<<5)#define ERR_RX_ABORT_SEQ (1<<4)#define ERR_RX_NON_OCTET (1<<3)#define ERR_RX_DECODING (1<<2)#define ERR_RX_CD_LOSS (1<<1)#define ERR_RX_CRC (1<<0)#define TX_RETRANSMIT_COUNT (1<<9)#define ERR_TX_COLLISION (1<<9)#define ERR_TX_RETRANSMIT_LIMIT (1<<8)#define ERR_TX_UNDERRUN (1<<6)#define ERR_TX_DEFERRED (1<<3)#define ERR_TX_CTS_LOSS (1<<1) /* typedefs */typedef unsigned int (*TaskFunction)(unsigned int);typedef unsigned int SDMA_CONFIGURATION;typedef unsigned int RX_COMMAND;typedef struct SdmaRxDesc{ unsigned int bufsize :16; unsigned int bytecnt :16; RX_COMMAND cmd_sts; unsigned int next_desc_ptr; unsigned int buf_ptr; unsigned int indexToRxQueue:4;/* unsigned char indexToRxQueue;*/ /* index to rx queue to release the descriptor to the right queue */} RX_DESC;typedef unsigned int TX_COMMAND;typedef struct SdmaTxDesc{ unsigned int bytecnt :16; unsigned int shadow :16; TX_COMMAND cmd_sts; unsigned int next_desc_ptr; unsigned int buf_ptr; unsigned int pointerToRxQueue;/* TaskFunction funcCallBackPointer;*/ unsigned int shadowOwner:1; /* if 1 -> belong to the GT */} TX_DESC; typedef unsigned int MPSC_SDCMR;/* sdmaLow.h API list */bool sdmaInitRxDescriptors (unsigned int PortNum , unsigned int ProtocolType, unsigned int priority);bool sdmaInitTxDescriptors (unsigned int PortNum, unsigned int ProtocolType, unsigned int priority);unsigned int* getCurrentTxDescriptor(unsigned int queueIndex);void SetFirstRxPointer(unsigned int PortNum , unsigned int ProtocolType , unsigned int priority,unsigned int* value);unsigned int* GetFirstRxPointer(unsigned int PortNum , unsigned int ProtocolType , unsigned int priority);unsigned int* GetFirstTxPointer(unsigned int PortNum , unsigned int ProtocolType , unsigned int priority);void SetFirstTxPointer(unsigned int PortNum , unsigned int ProtocolType , unsigned int priority,unsigned int* value);unsigned int* getRxDescriptorTail(unsigned int queueIndex);void sdmaStartRxDMA(UINT32 PortNum);#endif /* _SDMA_LOW_H */⌨️ 快捷键说明
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