gtmpscdrv.h

Curtiss-Wright Controls Embedded Computing公司的cw183板bsp源代码

/* gtMpscDrv.h - header file for gtMpscDrv module */
/**************************************************************************
 *
 *   Copyright (c) 2005 Curtiss-Wright Controls, Inc. All rights
 *   reserved.  This Source Code is the Property of Curtiss-Wright
 *   Controls, Inc. and can only be used in accordance with Source
 *   Code License Agreement(s) of Curtiss-Wright Controls, Inc. or any
 *   of its subsidiaries.
 *
 **************************************************************************/

/*
 modification history
--------------------
 01j,06dec05, tis    -add support for SCP-124
                     -set the max baudrate for the 183 & 124 boards to 115200
                     -rename Discovery_II directory to Discovery_III CR#12835.
 01i,26sep05, asu    add support for CCA-149
 01h,25may05, tis    set GT_MPSC_MAX_ASYNC_BAUDRATE to 2000000 for CCA-146 boards CR#10021
 01g,01may05, tis    add support for CCA-146
 01f,jan05,   jb     add loopback IOCTL macros PT kanata#2472
 01e,23dec04, tis    add Rx Idle Timer IOCTL macros
 01d,01nov04, tis    add support for CCA-145
 01c,17feb04, tis    added the macro GT_MPSC_SYNC_NUM_CHANNELS to support 1 SYNC and 2 AYNC
                     MPSC channels for the 122 boards PT#1881.
 01b 22sep03, aak    provisions for generic SIO API
 01a 01nov02, deb    PTR Initial release
*/

#ifndef GT_MPSCDRV_H
#define GT_MPSCDRV_H

#ifdef __cplusplus
extern "C" {
#endif


 /********************************
 ********  INCLUDE FILES  ********
 *********************************/

#include <vxWorks.h>
#include <iosLib.h>
#include <sioLib.h>
#include <semLib.h>

#include "config.h"

#if defined( VME_182) || defined(CCA_145) || defined(CCA_146) || defined(CCA_149) || defined(VME_183) || defined(SCP_124)
/* Generic Dy 4 SIO include file */
#include "h/drv/sio/sioDy4Drv.h"
/* Driver-specific include files */
#   if defined (SCP_124) || defined (VME_183)
#      include "h/drv/discovery_III/sio/gtMpscSio.h"
#      include "h/drv/discovery_III/sio/gtMpscErr.h"
#      include "h/drv/discovery_III/sio/gtMpscOS.h"
#      include "h/drv/discovery_III/sio/gtMpscBuf.h"
#      include "h/drv/discovery_III/sio/gtMpscAsync.h"
#      include "h/drv/discovery_III/sio/gtMpscRHDLC.h"
#  else
#      include "h/drv/discovery_II/sio/gtMpscSio.h"
#      include "h/drv/discovery_II/sio/gtMpscErr.h"
#      include "h/drv/discovery_II/sio/gtMpscOS.h"
#      include "h/drv/discovery_II/sio/gtMpscBuf.h"
#      include "h/drv/discovery_II/sio/gtMpscAsync.h"
#      include "h/drv/discovery_II/sio/gtMpscRHDLC.h"
#  endif    /*defined (SCP_124) || defined (VME_183)*/
#else
/* Generic Dy 4 SIO include file */
#include "h/drv/sio/sioDy4Drv.h"
/* Driver-specific include files */
#include "gtMpscSio.h"
#include "gtMpscErr.h"
#include "gtMpscOS.h"
#include "gtMpscBuf.h"
#include "gtMpscAsync.h"
#include "gtMpscRHDLC.h"
#endif

 /********************************
 ********  LOCAL DEFINES  ********
 *********************************/
/*max baud rate for async mode*/

#if defined(CCA_145)
#define GT_MPSC_MAX_ASYNC_BAUDRATE    300000
#elif defined(CCA_146) || defined(CCA_149)
#define GT_MPSC_MAX_ASYNC_BAUDRATE    2500000
#else
#define GT_MPSC_MAX_ASYNC_BAUDRATE    115200
#endif  /*defined(CCA_145) */


#ifdef VME_182
#define GT_MPSC_MAX_SYNC_BAUDRATE      5000000
#else
#define GT_MPSC_MAX_SYNC_BAUDRATE     10000000
#endif

/* protocols */

#define GT_MPSC_PROTOCOL_ASYNC        SIO_DY4_ASYNC
#define GT_MPSC_PROTOCOL_RHDLC        SIO_DY4_RHDLC


/* ioctls 
 * The constants below are defined to maintain backward compatibility.
 * They should not be used in new designs.
 * See generic Dy 4 SIO include file sioDy4Drv.h 
 */
#define GT_MPSC_SET_PROTOCOL         SIO_DY4_SET_PROTOCOL

#define GT_MPSC_SET_TX_BUFFERCAPACITY  SIO_DY4_SET_TXBUF_CAPACITY
#define GT_MPSC_GET_TX_BUFFERCAPACITY  SIO_DY4_GET_TXBUF_CAPACITY

#define GT_MPSC_SET_RX_BUFFERCAPACITY  SIO_DY4_SET_RXBUF_CAPACITY
#define GT_MPSC_GET_RX_BUFFERCAPACITY  SIO_DY4_GET_RXBUF_CAPACITY

#define GT_MPSC_SET_BLOCKING         SIO_DY4_SET_BLOCKING
#define GT_MPSC_GET_BLOCKING         SIO_DY4_GET_BLOCKING

#define GT_MPSC_SET_RXADDR           SIO_DY4_SET_RXADDR
#define GT_MPSC_GET_RXADDR           SIO_DY4_GET_RXADDR

#define GT_MPSC_SET_HALFDUPLEX       SIO_DY4_SET_HALFDUPLEX
#define GT_MPSC_GET_HALFDUPLEX       SIO_DY4_GET_HALFDUPLEX

#define GT_MPSC_SET_CHK_ADDR         SIO_DY4_SET_CHK_ADDR
#define GT_MPSC_GET_CHK_ADDR         SIO_DY4_GET_CHK_ADDR

#define GT_MPSC_SET_CHK_CRC          SIO_DY4_SET_CHK_CRC
#define GT_MPSC_GET_CHK_CRC          SIO_DY4_GET_CHK_CRC

#define GT_MPSC_SET_WRITE_TO         SIO_DY4_SET_WRITE_TO
#define GT_MPSC_GET_WRITE_TO         SIO_DY4_GET_WRITE_TO

#define GT_MPSC_SET_READ_TO          SIO_DY4_SET_READ_TO
#define GT_MPSC_GET_READ_TO          SIO_DY4_GET_READ_TO

#define GT_MPSC_SET_EXT_RX_CLK       SIO_DY4_SET_RXCLK_EXT
#define GT_MPSC_GET_EXT_RX_CLK       SIO_DY4_GET_RXCLK_EXT

#define GT_MPSC_SET_TX_CLK_OFF_DELAY SIO_DY4_SET_TXCLK_OFF_DELAY
#define GT_MPSC_GET_TX_CLK_OFF_DELAY SIO_DY4_GET_TXCLK_OFF_DELAY

#define GT_MPSC_SET_CRC_POLY         SIO_DY4_SET_CRC_POLY
#define GT_MPSC_GET_CRC_POLY         SIO_DY4_GET_CRC_POLY

#define GT_MPSC_OPEN                 SIO_OPEN
#define GT_MPSC_HUP                  SIO_HUP

#define GT_MPSC_MODE_GET             SIO_MODE_GET
#define GT_MPSC_MODE_SET             SIO_MODE_SET

#define GT_MPSC_GET_BAUDRATE         SIO_BAUD_GET
#define GT_MPSC_SET_BAUDRATE         SIO_BAUD_SET

#define GT_MPSC_HW_OPTS_GET          SIO_HW_OPTS_GET
#define GT_MPSC_HW_OPTS_SET          SIO_HW_OPTS_SET

#define GT_MPSC_AVAIL_MODES_GET      SIO_AVAIL_MODES_GET

#define GT_MPSC_FLUSH                SIO_DY4_FLUSH

#define GT_MPSC_ENABLE_INTERNAL_LOOPBACK   SIO_DY4_LOOPBACK
    
/* channels */
#define GT_MPSC_NUM_CHANNELS (2)

#ifdef SCP_122
#define GT_MPSC_SYNC_NUM_CHANNELS   1
#else
#define GT_MPSC_SYNC_NUM_CHANNELS   GT_MPSC_NUM_CHANNELS
#endif /*SCP_122*/


/* transfer modes */
#define GT_MPSC_MODE_INT            (SIO_DY4_MODE_INT)
#define GT_MPSC_MODE_DMA            (SIO_DY4_MODE_DMA)

/* CRC Polynomials */
#define GT_MPSC_SDLC_POLY     (SIO_DY4_POLY_SDLC)    /* default */
#define GT_MPSC_CRC16_POLY    (SIO_DY4_POLY_CRC16)
#define GT_MPSC_SDLC32_POLY   (SIO_DY4_POLY_SDLC32)    

/* IDLE Timer macros*/

#define GT_MPSC_SET_RX_IDLE_TIMER_PERIOD      0x2101
#define GT_MPSC_GET_RX_IDLE_TIMER_PERIOD      0x2102
#define GT_MPSC_RX_IDLE_TIMER_ENABLE          0x2103
 /********************************
 ********  LOCAL STRUCTS  ********
 *********************************/
/* device and channel structures */

struct _GT_MPSC_CHAN;

typedef struct
{
    int protocol;  /* which protocol is in use */
    int status;    /* error level */
    int (*open)( struct _GT_MPSC_CHAN * channel );
    int (*close)( struct _GT_MPSC_CHAN * channel );
    int (*read)( struct _GT_MPSC_CHAN * channel,unsigned char * bytes, int size );
    int (*write)( struct _GT_MPSC_CHAN * channel,unsigned char * bytes, int size );
    int (*ioctl)( struct _GT_MPSC_CHAN * channel,int command, int param );
    void (*txInt)( struct _GT_MPSC_CHAN * channel);
    void (*rxInt)( struct _GT_MPSC_CHAN * channel);

} GT_MPSCPROTOCOL;

typedef struct _GT_MPSC_CHAN
{
    /* misc values */

    SEM_ID readSem;       /* used to implement timeouts on
               * blocking reads
               */
    SEM_ID writeSem;      /* used to implement timeouts on
               * blocking writes
               */

    int    channel;       /* GT_MPSC_CHANNEL_0 or GT_MPSC_CHANNEL_1 */
    char * name;          /* name of the channel */

    int    isOpen;        /* the number of sucesssful opens() on this channel */

    /* interrupt/polled mode configuration info */

    int    blocking;      /* [TRUE | FALSE] */
    int    writeTimeout;  /* how long before we give up on blocking write */
    int    readTimeout;   /* how long before we give up on blocking read  */

    /* status */

    int    readError;     /* last read error */
    int    writeError;    /* last write error */
    int    openError;     /* last open error */
    int    closeError;    /* last close error */
    int    error;         /* any error not of the other types */
    int   writeCount;     /* number of calls to write */
    int   readCount;      /* number of calls to read */
    int   intTxCount;     /* transmit interrupt */
    int   intRxCount;     /* Receive Interrupt */
    int   intSDMACount;   /* SDMA Interrupt (for Rx) */
    int   frameError;     /* frame error */

    GT_MPSCPROTOCOL protocol;      /* describes current protocol in use */

    GT_MPSCBUF_STREAM txStreamBuf; /* ring buffer used for transmission 
                    * of stream data */
    GT_MPSCBUF_STREAM rxStreamBuf; /* ring buffer used for reception 
                    * of stream data */

    GT_MPSCBUF_FRAMES txFrameBuf;  /* ring buffer used for transmission 
                    * of frame data */
    GT_MPSCBUF_FRAMES rxFrameBuf;  /* ring buffer used for reception 
                    * of frame data */
    MPSC_SIO_CHAN *   pMpscChan;  /* Pointer to the SIO Channel structure */

} GT_MPSC_CHAN;

typedef struct
{
    /* must be first */
    DEV_HDR devHdr;

    GT_MPSC_CHAN channel;
} GT_MPSC_DEV;

 /********************************
 **  LOCAL FUNCTION PROTOTYPES  **
 *********************************/
STATUS gtMpscDrv( int reserved );
STATUS gtMpscDevCreat( char * devName, int channel );
STATUS gtMpscDrvRemove( int force_close );
STATUS gtMpscDevRemove( char * devName );

int gtMpscDrvOpen( DEV_HDR * pDevHdr, char * pName, int mode );
STATUS gtMpscDrvClose( GT_MPSC_DEV * pDev );
int gtMpscDrvIoctl( GT_MPSC_DEV * pDev, int command, int arg );
int gtMpscDrvRead( GT_MPSC_DEV * pDev, unsigned char * pBuf, int nBytes );
int gtMpscDrvWrite( GT_MPSC_DEV * pDev, unsigned char * pBuf, int nBytes );

void gtMpscDrvRxInt(GT_MPSC_CHAN * pDrvChan);
void gtMpscDrvTxInt(GT_MPSC_CHAN * pDrvChan);




#ifdef __cplusplus
}
#endif

#endif /* GT_MPSCDRV_H */