fpgatimer.h
来自「Curtiss-Wright Controls Embedded Computi」· C头文件 代码 · 共 68 行
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68 行
/* fpgaTimer.h - DY 4 VME-182 board series vxWorks file. *//********************************************************************** * * Copyright (c) 2003-2004, Dy 4 Systems All rights reserved. * This Source Code is the Property of Dy 4 Systems Inc. and can * only be used in accordance with Source Code License * Agreement of Dy 4 Systems Inc. dba (doing business as) * CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING, "CWCEC". * **********************************************************************//* Copyright 1984 - 1997 Wind River Systems, Inc. *//*modification history--------------------01b,10nov04, tis add support for CCA-14501a,29may03, rgs Standard file header added.*//*DESCRIPTION:FPGA timer library header file.INCLUDE FILES: dy4182.h or cca145.hSEE ALSO:*/#ifndef __INCfpgaTimerh#define __INCfpgaTimerh#ifdef VME_182#include "dy4182.h"#endif#ifdef CCA_145#include "cca145.h"#endif#ifdef VME_183#include "cwv183.h"#endiftypedef enum ioFpgaTimer{ IOFPGA_TIMER_START = -1, IOFPGA_TIMER0_0, IOFPGA_TIMER0_1, IOFPGA_TIMER0_2, IOFPGA_TIMER1_0, IOFPGA_TIMER1_1, IOFPGA_TIMER1_2, IOFPGA_TIMER_END} IOFPGA_TIMER;void fpgaTimerHwInit(void);BSP_STATUS fpgaTimerIntClear(IOFPGA_TIMER timer);BSP_STATUS fpgaTimerStart(IOFPGA_TIMER timer);BSP_STATUS fpgaTimerStop(IOFPGA_TIMER timer);BSP_STATUS fpgaTimerLoad(IOFPGA_TIMER timer, unsigned int count);BSP_STATUS fpgaTimerRead(IOFPGA_TIMER timer, unsigned int *count);#endif
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