diofpga.c

Curtiss-Wright Controls Embedded Computing公司的cw183板bsp源代码

/* dioFpga.c - Digitial I/O device driver */

/**************************************************************************
 *
 *   Copyright (c) 2004-2005, Curtiss-Wright Controls, Inc. All rights reserved.
 *   This Source Code is the Property of Curtiss-Wright Controls, Inc. and 
 *   can only be used in accordance with Source Code License Agreement of
 *   CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING, "CWCEC".
 *
 **************************************************************************/

/*
modification history
--------------------
01d,16nov05,tis  -update the DIO routines to reflect the actual DIO interrupt groups order CR#12541.
                 -add the function fpgaDioIntClear() to clear the DIO interrupts CR#12295.
                 -update dioInit() to connect a default dio ISR for all the dio lines CR#12609.
                 -update dioIntEnable() to return error if user attempts to enable interrupts on output lines,
                  or enable lines belonging to another CPU. CR#12609.
                 -update dioIntDisable() to return error if user attempts to disable DIO lines belonging to
                  another CPU CR#12609.
                 -update dioConnect() to return error if the passed ISR is NULL, or if the user attempts to connect
                 an ISR to an output bit, or if the user attempts to connect ISR to another CPU's DIO line CR#12609.
                 -update dioDirectionSet() to return error if user attempts to change direction of bits which are 
                 enabled for interrupts, or if the lines are assigned to another CPU CR#12609.
                 -updated the function dioEdgeSet() to return error if the user attempts to set edge to uninitialized
                 dio lines or if the requested dio bits which are enabled for interrupts CR#12609.
01c,20Jan05,rcd  corrected dioConnect.
01b,19Jan05,rcd  corrected dioIntEnable/disable.
01a,14Dec04,rcd  written (from dy4182, ver 02d)
*/

/*
DESCRIPTION
This module contains functions for the digital I/O device in the FPGA for 183.

FEATURES

INTERRUPT HANDLING
The BSP should install the DIO handler by calling dioConnect() with the user
defined interrupt handling routine and then enable the the corresponding
interrupt sources by invoking dioEnable().

DRIVER INITIALIZATION
Before the driver can be used, it must be first initialized by invoking
the routine dioInit(). 

USER CALLABLE ROUTINES
This library provides functions for three major operations on the DIO lines:
(NOTE: the user must pass in the FPGA base address when calling these functions)

1) Read/Write - The user can read from any DIO lines. However, writing is
   restricted to non-read-only lines (SEE DIO Mode).

2) Setting the mode - The user can set any DIO lines to INPUT (read-only) or
   OUTPUT (read/write capabilities).

3) Setting the trigger type - The user can set the DIO lines' trigger types to
   Rising or Falling.
*/

/* includes */

#include "vxWorks.h"
#include "string.h"
#include <stdio.h>
#include "config.h"
#include <intLib.h>

#ifdef VME_183
#include "fpga183.h"
#include "cwv183.h"
#endif

#include <taskLib.h>
#include "arch/ppc/ivPpc.h"
#include "logLib.h"
#include "h/drv/dio/dio_dy4.h"

#ifdef __cplusplus
extern "C" {
#endif

/* Local definitions */
#undef DEBUG 

/* external declarations*/

IMPORT void sysOutWordNoSwap (UINT32, UINT16);
IMPORT UINT16 sysInWordNoSwap (UINT32);


/* forward declarations */
LOCAL void dioDefaultIsr(int dio);
unsigned int getDioIntMask(void);
/**************************************************************************
NOTE:  The following is stubbed out until DIO can be shared between CPU's
       Only one CPU should be configured to own all DIO lines!
**************************************************************************/
#define DIO_SEM_ID 3

int cpuSemGet(int semID)
{
return(BSP_OK);
}

void cpuSemFree(int semID)
{
return;
}

/***************************************************************************   
*
* dioInit - initialize the dio device 
*
* This routine performs the initialization of the dio device registers.
*
* RETURNS: OK if successful,otherwise RETURNS ERROR.
*
* NOMANUAL
*/

STATUS dioInit(void)
    {
    volatile UINT16 readIntStat;
    UINT16 dioMask = (UINT16)dioCpuConfig; /* the global set in sysLib.c */
    int lock, bitcount, checkbit = 0;

    while(cpuSemGet(DIO_SEM_ID) != BSP_OK);
    /* Lock out interrupts */
    lock = intLock();

    /* mask the interrupts from our CPU */
    dioIntDisable(dioMask);

    /* Connect deafult DIO ISR for the DIO lines owned by this CPU*/
    for (bitcount = 0; bitcount < DIO_LINES; bitcount++)
    	{

     	checkbit = (dioMask & (1 << bitcount)) ? 1 : 0;

        if (checkbit == 1)
            {
                intConnect ((void *)(FPGA_DIO0_INT_SRC+bitcount), (VOIDFUNCPTR) dioDefaultIsr, bitcount);
            }
        }
    /* Clear all pending interrupts for fresh use by enabling the bits in the FPGA_DIO_MSB_INTENBL and
     * FPGA_DIO_LSB_INTENBL registers then writing 1 to each bit we use in the FPGA_DIO_MSB_INTSTAT and
     * FPGA_DIO_LSB_INTSTAT register.  Writing 0 has no effect
     */

    sysOutWordNoSwap ((UINT32)FPGA_DIO_MSB_INTENBL, dioMask);
    sysOutWordNoSwap ((UINT32)FPGA_DIO_MSB_INTSTAT, dioMask);
    readIntStat = sysInWordNoSwap ((UINT32)FPGA_DIO_MSB_INTSTAT);

    intUnlock (lock);
    cpuSemFree(DIO_SEM_ID);

    /* check only our bits */
    readIntStat &= dioMask;

    if (readIntStat != 0)
        {
        logMsg ("\nCouldn't Clear Interrupts for fresh use\n",0,0,0,0,0,0);
        return (ERROR);
        }
    return OK;
    }


/***************************************************************************
*
* dioIntEnable - enable Discrete I/O (DIO) local interrupts
*
* This routine enables the given DIO interrupts by setting the
* corresponding bits in the dioMask register of the FPGA.
*
* RETURNS: OK, or ERROR if the argument is invalid, or if an attempt is made to
*          enable interrupts on output lines, or enable lines belonging to
*          another CPU.
*
* SEE ALSO: dioIntDisable()
*
*/

STATUS dioIntEnable
    (
    UINT32 dioMask   /* interrupt bits */
    )
    {
    int lock;
    int i;
    UINT16 dirSetMask;

    /* check if attempting to enable DIO interrupt to different CPU */
    if(0 != (dioMask & (~dioCpuConfig)))
      {
        logMsg("ERROR: attempting to enable other CPU's DIO lines!\n",0,0,0,0,0,0);
	return ERROR;
      }
    /* restrict to current cpu DIO line configuration */
    dioMask &= dioCpuConfig;

    /* get current direction setting */
    dirSetMask = sysInWordNoSwap ((UINT32)FPGA_DIO_MODE);
    
    /* Make sure not to enable interrupts on an output bit */
    if (0 != (dioMask & dirSetMask))
      {
        logMsg("ERROR: attempting to enable interrupts on bits designated as outputs!\n",0,0,0,0,0,0);
	return ERROR;
      }
    /* Enable the DIO interrupts*/
    while(cpuSemGet(DIO_SEM_ID) != BSP_OK);
    lock = intLock ();
    for (i = 0; i < DIO_LINES; i++)
        {
        if (dioMask & (1 << i))
          fpgaIntEnable(FPGA_DIO0_INT_SRC + i);
        }

    intUnlock (lock);
    cpuSemFree(DIO_SEM_ID);
    return (OK);
    }

/***************************************************************************
*
* dioIntDisable - disable Discrete I/O (DIO) local interrupts
*
* This routine disables the given discrete I/O (DIO) interrupts by clearing the
* corresponding bits in the dioMask register of the FPGA.
*
* RETURNS: OK, or ERROR if the argument is invalid, or if an attempt is made to
*          disable lines belonging to another CPU.
*
*
* SEE ALSO: dioIntEnable()
*/

STATUS dioIntDisable
    (
      UINT32 dioMask /* interrupt bits */
    )
    {
    int lock;
    int i;
    /* check if attempting to disable DIO interrupt to different CPU */
    if(0 != (dioMask & (~dioCpuConfig)))
      {
        logMsg("ERROR: attempting to disable other CPU's DIO lines!\n",0,0,0,0,0,0);
	return ERROR;
      }
    /* restrict to current cpu DIO line configuration */
    dioMask &= dioCpuConfig;

    while(cpuSemGet(DIO_SEM_ID) != BSP_OK);
    lock = intLock ();
    for (i = 0; i < DIO_LINES; i++)
        {
        if (dioMask & (1 << i))
            fpgaIntDisable(FPGA_DIO0_INT_SRC + i);
        }

    intUnlock (lock);
    cpuSemFree(DIO_SEM_ID);
    return (OK);
    }




/***************************************************************************
*
* dioConnect - connect a routine to the Discrete I/O (DIO) interrupt
*
* This routine specifies the interrupt serivce routine to be called at each
* interrupt for the corresponding bit in the status register.
*
* RETURNS: OK, or ERROR if failed to connect ISR, or the passed ISR
*          is NULL, or if user attempts to connect an ISR to an output bit, or
*          if user attempts to connect ISR to another CPU's DIO line.
*
* SEE ALSO: intConnect(), dioIntEnable()
*/

STATUS dioConnect
    (
    UINT32  dioMask,      /* interrupt mask to attach */
    FUNCPTR dioRoutine,   /* routine to be called */
    int     arg           /* parameter to be passed to routine */
    )
    {
    int lock;
    UINT16 dirSetMask;
    int bitcount,checkbit = 0;

    /* ensure passed routine is not NULL */
    if(NULL == (VOIDFUNCPTR) dioRoutine)
      {
          logMsg("ERROR: attempting to attach null as interrupt service routine!\n",0,0,0,0,0,0);
          return ERROR;
      }

    /* check if attempting to connect interrupt to different CPU */
    if(0 != (dioMask & (~dioCpuConfig)))
      {
        logMsg("ERROR: attempting to connect ISR to other CPU's DIO lines!\n",0,0,0,0,0,0);
	return ERROR;
      }
     /* restrict to current cpu DIO line configuration */
    dioMask &= dioCpuConfig;

     /* get current direction setting */
    dirSetMask = sysInWordNoSwap ((UINT32)FPGA_DIO_MODE);

    /* Make sure not to connect an ISR to an output bit */
    if(0 != (dioMask & dirSetMask))
      {
         logMsg("ERROR: attempting to attach interrupt to output line!\n",0,0,0,0,0,0);
	 return ERROR;
      }

    for (bitcount = 0; bitcount < DIO_LINES; bitcount++)
    	{