ram512.mif

sdram 控制器的verilog 实现

-- Copyright (C) 1991-2007 Altera Corporation
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-- functions, and any output files from any of the foregoing 
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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.

-- Quartus II generated Memory Initialization File (.mif)

WIDTH=16;
DEPTH=512;

ADDRESS_RADIX=UNS;
DATA_RADIX=HEX;

CONTENT BEGIN
	[0..511]  :   0000;
END;