📄 temp.lss
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temp.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 00000000 00800100 00000724 000007b8 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00000724 00000000 00000000 00000094 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 00000000 00800100 00000724 000007b8 2**0
ALLOC
3 .noinit 00000000 00800100 00800100 000007b8 2**0
CONTENTS
4 .eeprom 00000000 00810000 00810000 000007b8 2**0
CONTENTS
5 .stab 00000e34 00000000 00000000 000007b8 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 00000b37 00000000 00000000 000015ec 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 0c 94 46 00 jmp 0x8c
4: 0c 94 63 00 jmp 0xc6
8: 0c 94 63 00 jmp 0xc6
c: 0c 94 63 00 jmp 0xc6
10: 0c 94 63 00 jmp 0xc6
14: 0c 94 63 00 jmp 0xc6
18: 0c 94 63 00 jmp 0xc6
1c: 0c 94 63 00 jmp 0xc6
20: 0c 94 63 00 jmp 0xc6
24: 0c 94 63 00 jmp 0xc6
28: 0c 94 63 00 jmp 0xc6
2c: 0c 94 63 00 jmp 0xc6
30: 0c 94 63 00 jmp 0xc6
34: 0c 94 63 00 jmp 0xc6
38: 0c 94 63 00 jmp 0xc6
3c: 0c 94 63 00 jmp 0xc6
40: 0c 94 63 00 jmp 0xc6
44: 0c 94 63 00 jmp 0xc6
48: 0c 94 63 00 jmp 0xc6
4c: 0c 94 63 00 jmp 0xc6
50: 0c 94 63 00 jmp 0xc6
54: 0c 94 63 00 jmp 0xc6
58: 0c 94 63 00 jmp 0xc6
5c: 0c 94 63 00 jmp 0xc6
60: 0c 94 63 00 jmp 0xc6
64: 0c 94 63 00 jmp 0xc6
68: 0c 94 63 00 jmp 0xc6
6c: 0c 94 63 00 jmp 0xc6
70: 0c 94 63 00 jmp 0xc6
74: 0c 94 63 00 jmp 0xc6
78: 0c 94 63 00 jmp 0xc6
7c: 0c 94 63 00 jmp 0xc6
80: 0c 94 63 00 jmp 0xc6
84: 0c 94 63 00 jmp 0xc6
88: 0c 94 63 00 jmp 0xc6
0000008c <__ctors_end>:
8c: 11 24 eor r1, r1
8e: 1f be out 0x3f, r1 ; 63
90: cf ef ldi r28, 0xFF ; 255
92: d0 e1 ldi r29, 0x10 ; 16
94: de bf out 0x3e, r29 ; 62
96: cd bf out 0x3d, r28 ; 61
00000098 <__do_copy_data>:
98: 11 e0 ldi r17, 0x01 ; 1
9a: a0 e0 ldi r26, 0x00 ; 0
9c: b1 e0 ldi r27, 0x01 ; 1
9e: e4 e2 ldi r30, 0x24 ; 36
a0: f7 e0 ldi r31, 0x07 ; 7
a2: 00 e0 ldi r16, 0x00 ; 0
a4: 0b bf out 0x3b, r16 ; 59
a6: 02 c0 rjmp .+4 ; 0xac
000000a8 <.__do_copy_data_loop>:
a8: 07 90 elpm r0, Z+
aa: 0d 92 st X+, r0
000000ac <.__do_copy_data_start>:
ac: a0 30 cpi r26, 0x00 ; 0
ae: b1 07 cpc r27, r17
b0: d9 f7 brne .-10 ; 0xa8
000000b2 <__do_clear_bss>:
b2: 11 e0 ldi r17, 0x01 ; 1
b4: a0 e0 ldi r26, 0x00 ; 0
b6: b1 e0 ldi r27, 0x01 ; 1
b8: 01 c0 rjmp .+2 ; 0xbc
000000ba <.do_clear_bss_loop>:
ba: 1d 92 st X+, r1
000000bc <.do_clear_bss_start>:
bc: a0 30 cpi r26, 0x00 ; 0
be: b1 07 cpc r27, r17
c0: e1 f7 brne .-8 ; 0xba
c2: 0c 94 72 03 jmp 0x6e4
000000c6 <__bad_interrupt>:
c6: 0c 94 00 00 jmp 0x0
000000ca <spi_initial>:
#define DF_SELECT_1 FLASH_CS_L
#define DF_DESELECT_1 FLASH_CS_H
void spi_initial(void)
{
ca: cf 93 push r28
cc: df 93 push r29
ce: cd b7 in r28, 0x3d ; 61
d0: de b7 in r29, 0x3e ; 62
d2: 21 97 sbiw r28, 0x01 ; 1
d4: 0f b6 in r0, 0x3f ; 63
d6: f8 94 cli
d8: de bf out 0x3e, r29 ; 62
da: 0f be out 0x3f, r0 ; 63
dc: cd bf out 0x3d, r28 ; 61
uint8_t temp;
DDRB |= 0x07; //MISO=input and MOSI,SCK,SS = output
de: 80 91 37 00 lds r24, 0x0037
e2: 87 60 ori r24, 0x07 ; 7
e4: 80 93 37 00 sts 0x0037, r24
PORTB |= 0x0f; //MISO上拉电阻有效
e8: 80 91 38 00 lds r24, 0x0038
ec: 8f 60 ori r24, 0x0F ; 15
ee: 80 93 38 00 sts 0x0038, r24
SPCR = 0x5c; //SPI允许，主机模式，MSB
f2: 8c e5 ldi r24, 0x5C ; 92
f4: 80 93 2d 00 sts 0x002D, r24
SPSR = 0x00;
f8: 10 92 2e 00 sts 0x002E, r1
temp = SPSR;
fc: 80 91 2e 00 lds r24, 0x002E
100: 89 83 std Y+1, r24 ; 0x01
temp = SPDR; //清空SPI，和中断标志，使SPI空闲
102: 80 91 2f 00 lds r24, 0x002F
106: 89 83 std Y+1, r24 ; 0x01
}
108: 21 96 adiw r28, 0x01 ; 1
10a: 0f b6 in r0, 0x3f ; 63
10c: f8 94 cli
10e: de bf out 0x3e, r29 ; 62
110: 0f be out 0x3f, r0 ; 63
112: cd bf out 0x3d, r28 ; 61
114: df 91 pop r29
116: cf 91 pop r28
118: 08 95 ret
0000011a <write_SPI>:
uint8_t write_SPI(uint8_t c)
{
11a: cf 93 push r28
11c: df 93 push r29
11e: cd b7 in r28, 0x3d ; 61
120: de b7 in r29, 0x3e ; 62
122: 22 97 sbiw r28, 0x02 ; 2
124: 0f b6 in r0, 0x3f ; 63
126: f8 94 cli
128: de bf out 0x3e, r29 ; 62
12a: 0f be out 0x3f, r0 ; 63
12c: cd bf out 0x3d, r28 ; 61
12e: 89 83 std Y+1, r24 ; 0x01
uint8_t data;
SPDR=c;
130: 89 81 ldd r24, Y+1 ; 0x01
132: 80 93 2f 00 sts 0x002F, r24
while((SPSR&0x80)==0);
136: 80 91 2e 00 lds r24, 0x002E
13a: 88 23 and r24, r24
13c: e4 f7 brge .-8 ; 0x136
data=SPDR;
13e: 80 91 2f 00 lds r24, 0x002F
142: 8a 83 std Y+2, r24 ; 0x02
return data;
144: 8a 81 ldd r24, Y+2 ; 0x02
146: 99 27 eor r25, r25
}
148: 22 96 adiw r28, 0x02 ; 2
14a: 0f b6 in r0, 0x3f ; 63
14c: f8 94 cli
14e: de bf out 0x3e, r29 ; 62
150: 0f be out 0x3f, r0 ; 63
152: cd bf out 0x3d, r28 ; 61
154: df 91 pop r29
156: cf 91 pop r28
158: 08 95 ret
0000015a <Host_write_SPI>:
void Host_write_SPI(uint8_t c)
{
15a: cf 93 push r28
15c: df 93 push r29
15e: cd b7 in r28, 0x3d ; 61
160: de b7 in r29, 0x3e ; 62
162: 21 97 sbiw r28, 0x01 ; 1
164: 0f b6 in r0, 0x3f ; 63
166: f8 94 cli
168: de bf out 0x3e, r29 ; 62
16a: 0f be out 0x3f, r0 ; 63
16c: cd bf out 0x3d, r28 ; 61
16e: 89 83 std Y+1, r24 ; 0x01
SPDR=c;
170: 89 81 ldd r24, Y+1 ; 0x01
172: 80 93 2f 00 sts 0x002F, r24
while((SPSR&0x80)==0);
176: 80 91 2e 00 lds r24, 0x002E
17a: 88 23 and r24, r24
17c: e4 f7 brge .-8 ; 0x176
}
17e: 21 96 adiw r28, 0x01 ; 1
180: 0f b6 in r0, 0x3f ; 63
182: f8 94 cli
184: de bf out 0x3e, r29 ; 62
186: 0f be out 0x3f, r0 ; 63
188: cd bf out 0x3d, r28 ; 61
18a: df 91 pop r29
18c: cf 91 pop r28
18e: 08 95 ret
00000190 <df_init>:
void df_init(void)
{
190: cf 93 push r28
192: df 93 push r29
194: cd b7 in r28, 0x3d ; 61
196: de b7 in r29, 0x3e ; 62
cbi(DDRE,1);
198: 80 91 22 00 lds r24, 0x0022
19c: 8d 7f andi r24, 0xFD ; 253
19e: 80 93 22 00 sts 0x0022, r24
sbi(PORTE,1);
1a2: 80 91 23 00 lds r24, 0x0023
1a6: 82 60 ori r24, 0x02 ; 2
1a8: 80 93 23 00 sts 0x0023, r24
cbi(DDRE,0);
1ac: 80 91 22 00 lds r24, 0x0022
1b0: 8e 7f andi r24, 0xFE ; 254
1b2: 80 93 22 00 sts 0x0022, r24
sbi(PORTE,0);
1b6: 80 91 23 00 lds r24, 0x0023
1ba: 81 60 ori r24, 0x01 ; 1
1bc: 80 93 23 00 sts 0x0023, r24
spi_initial();
1c0: 0e 94 65 00 call 0xca
cbi(DDRE,5);//RDY
1c4: 80 91 22 00 lds r24, 0x0022
1c8: 8f 7d andi r24, 0xDF ; 223
1ca: 80 93 22 00 sts 0x0022, r24
sbi(PORTE,5);
1ce: 80 91 23 00 lds r24, 0x0023
1d2: 80 62 ori r24, 0x20 ; 32
1d4: 80 93 23 00 sts 0x0023, r24
sbi(DDRE,2);//CS
1d8: 80 91 22 00 lds r24, 0x0022
1dc: 84 60 ori r24, 0x04 ; 4
1de: 80 93 22 00 sts 0x0022, r24
FLASH_CS_H;
1e2: 80 91 23 00 lds r24, 0x0023
1e6: 84 60 ori r24, 0x04 ; 4
1e8: 80 93 23 00 sts 0x0023, r24
sbi(DDRE,4);//RES
1ec: 80 91 22 00 lds r24, 0x0022
1f0: 80 61 ori r24, 0x10 ; 16
1f2: 80 93 22 00 sts 0x0022, r24
FLASH_RES_H;
1f6: 80 91 23 00 lds r24, 0x0023
1fa: 80 61 ori r24, 0x10 ; 16
1fc: 80 93 23 00 sts 0x0023, r24
sbi(DDRE,3);//WP
200: 80 91 22 00 lds r24, 0x0022
204: 88 60 ori r24, 0x08 ; 8
206: 80 93 22 00 sts 0x0022, r24
WP_H;
20a: 80 91 23 00 lds r24, 0x0023
20e: 88 60 ori r24, 0x08 ; 8
210: 80 93 23 00 sts 0x0023, r24
}
214: df 91 pop r29
216: cf 91 pop r28
218: 08 95 ret
0000021a <DF_read_reg>:
uint8_t DF_read_reg(void)
{
21a: cf 93 push r28
21c: df 93 push r29
21e: cd b7 in r28, 0x3d ; 61
220: de b7 in r29, 0x3e ; 62
222: 21 97 sbiw r28, 0x01 ; 1
224: 0f b6 in r0, 0x3f ; 63
226: f8 94 cli
228: de bf out 0x3e, r29 ; 62
22a: 0f be out 0x3f, r0 ; 63
22c: cd bf out 0x3d, r28 ; 61
uint8_t temp;
temp=0;
22e: 19 82 std Y+1, r1 ; 0x01
FLASH_CS_L;
230: 80 91 23 00 lds r24, 0x0023
234: 8b 7f andi r24, 0xFB ; 251
236: 80 93 23 00 sts 0x0023, r24
temp=write_SPI(0xd7);
23a: 87 ed ldi r24, 0xD7 ; 215
23c: 0e 94 8d 00 call 0x11a
240: 89 83 std Y+1, r24 ; 0x01
temp=write_SPI(0x00);
242: 80 e0 ldi r24, 0x00 ; 0
244: 0e 94 8d 00 call 0x11a
248: 89 83 std Y+1, r24 ; 0x01
FLASH_CS_H;
24a: 80 91 23 00 lds r24, 0x0023
24e: 84 60 ori r24, 0x04 ; 4
250: 80 93 23 00 sts 0x0023, r24
return temp;
254: 89 81 ldd r24, Y+1 ; 0x01
256: 99 27 eor r25, r25
}
258: 21 96 adiw r28, 0x01 ; 1
25a: 0f b6 in r0, 0x3f ; 63
25c: f8 94 cli
25e: de bf out 0x3e, r29 ; 62
260: 0f be out 0x3f, r0 ; 63
262: cd bf out 0x3d, r28 ; 61
264: df 91 pop r29
266: cf 91 pop r28
268: 08 95 ret
0000026a <DF_wait_busy>:
//检查状态寄存器最高位是否为忙，并等待空闲
void DF_wait_busy(void)
{
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