📄 config.h
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defined(CPU_1020E) || defined(CPU_1022E)/* * 720T ,740T, and 102X can be either write-through or copyback (defines whether * write-buffer is enabled); cache itself is write-through. */#undef USER_I_CACHE_MODE#define USER_I_CACHE_MODE CACHE_COPYBACK/* * 720T and 740T have a combined Instruction/Data cache, so the modes must * be identical. */#undef USER_D_CACHE_MODE#define USER_D_CACHE_MODE (USER_I_CACHE_MODE)#endif /* defined(720T/720T_T/740T/740T_T) */#if defined(CPU_920T) || defined(CPU_920T_T) || \ defined(CPU_940T) || defined(CPU_940T_T) || \ defined(CPU_946ES) || defined(CPU_946ES_T)/* * 920T/940T/946ES I-cache mode is a bit of an inappropriate concept, * but use this. * */#undef USER_I_CACHE_MODE#define USER_I_CACHE_MODE CACHE_WRITETHROUGH/* 920T/940T/946ES has to be this. */#undef USER_D_CACHE_MODE#define USER_D_CACHE_MODE CACHE_COPYBACK#endif /* defined(CPU_920T/940T/946ES) */#if defined(CPU_940T) || defined(CPU_940T_T)/* * All ARM 940T BSPs must define a variable sysCacheUncachedAdrs: a * pointer to a word that is uncached and is safe to read (i.e. has no * side effects). This is used by the cacheLib code to perform a read * (only) to drain the write-buffer. Clearly this address must be present * within one of the regions created within sysPhysMemDesc, where it must * be marked as non-cacheable. There are many such addresses we could use * on the board, but we choose to use an address here that will be * mapped in on just about all configurations: a safe address within the * interrupt controller: the IRQ Enabled status register. This saves us * from having to define a region just for this pointer. This constant * defined here is used to initialise sysCacheUncachedAdrs in sysLib.c * and is also used by the startup code in sysALib.s and romInit.s in * draining the write-buffer. */#define SYS_CACHE_UNCACHED_ADRS AMBA_INT_CSR_ENB#endif /* defined(CPU_940T/940T_T) */#if defined(CPU_740T) || defined(CPU_740T_T) || \ defined(CPU_940T) || defined(CPU_940T_T) || \ defined(CPU_946ES) || defined(CPU_946ES_T)/* * 740T/940T/946E have an MPU and not a full MMU, so only INCLUDE_MMU_MPU can be * supported, and not full page-table-style MMU. Include support for * the MPU by default (this can be overridden, if desired). */#undef INCLUDE_MMU_FULL#undef INCLUDE_MMU_BASIC#define INCLUDE_MMU_MPU#undef INCLUDE_MMU_MPU#endif /* defined(740T/940T/946ES) */#if defined(CPU_720T) || defined(CPU_720T_T) || \ defined(CPU_920T) || defined(CPU_920T_T) || \ defined(CPU_1020E) || defined(CPU_1022E)/* * Include MMU BASIC and CACHE support for command line and project builds */#undef INCLUDE_MMU_BASIC#define INCLUDE_MMU_BASIC#undef INCLUDE_CACHE_SUPPORT#define INCLUDE_CACHE_SUPPORT#endif /* defined(720T/720T_T/920T/920T_T/CPU_1020E/CPU_1022E) *//* * Network driver configuration. * * De-select unused (default) network drivers selected in configAll.h. */#undef INCLUDE_ENP /* include CMC Ethernet interface*/#undef INCLUDE_EX /* include Excelan Ethernet interface */#undef INCLUDE_SM_NET /* include backplane net interface */#undef INCLUDE_SM_SEQ_ADDR /* shared memory network auto address setup *//* Enhanced Network Driver (END) Support */#undef INCLUDE_END#define INCLUDE_END#ifdef INCLUDE_END#define INCLUDE_MIILIB/*#define INCLUDE_DEC21X40END*/ /* include PCI-based DEC 21X4X END Ethernet *//*#define INCLUDE_FEI82557END*/ /* include PCI-based Intel END Ethernet */#ifndef SERIAL_DEBUG#undef WDB_COMM_TYPE /* WDB agent communication path is END */#define WDB_COMM_TYPE WDB_COMM_END#define WBD_AGENT_END#undef WDB_MODE#define WDB_MODE WDB_MODE_TASK /* WDB_MODE_[DUAL|TASK|EXTERN] */#else#undef WBD_AGENT_END#endif /* SERIAL_DEBUG */#ifdef INCLUDE_DEC21X40END#define INCLUDE_MIILIB#endif#endif /* INCLUDE_END */#define INCLUDE_SHELL/* PCI configuration */#undef INCLUDE_PCI/* * Interrupt mode - interrupts can be in either preemptive or non-preemptive * mode. For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL */#define INT_MODE INT_NON_PREEMPT_MODEL/* * Enable BSP-configurable interrupt priorities: order of servicing and * masking of interrupts will be determined by ambaIntLvlPriMap[] in * sysLib.c. If AMBA_INT_PRIORITY_MAP is not defined, priority of * interrupts will be least-significant bit first. *//* #define AMBA_INT_PRIORITY_MAP BSP-configurable interrupt priorities *//* * miscellaneous definitions * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h * (as is more usual) because the stack size depends on the interrupt * structure of the BSP. */#define ISR_STACK_SIZE 0x1000 /* size of ISR stack, in bytes *//* Optional timestamp support */#undef INCLUDE_TIMESTAMP /* define to include timestamp driver */#define INCLUDE_TIMESTAMP/* Optional TrueFFS support */#undef INCLUDE_TFFS /* define to include TrueFFS driver */#ifdef INCLUDE_TFFS#define INCLUDE_SHOW_ROUTINES#define INCLUDE_DOSFS#endif /* INCLUDE_TFFS */#define BUS BUS_TYPE_NONE#define FCLK 50700000#define HCLK 50700000#define PCLK 50700000#define UCLK 50700000#define RCLK 32768#undef FCLK_20MHZ#define FCLK_50MHZ#undef FCLK_60MHZ#undef FCLK_70MHZ#undef FCLK_75MHZ#undef SYS_TIMER_CLK#undef AUX_TIMER_CLK#define SYS_TIMER_CLK (128) #define AUX_TIMER_CLK (128) #define SYS_CLK_RATE_MAX 64#define SYS_CLK_RATE_MIN 1 #define AUX_CLK_RATE_MIN 1#define AUX_CLK_RATE_MAX 64#undef SYS_CLK_RATE#define SYS_CLK_RATE 60/*#define _ISR_STARTADDRESS 0x33ffff00 */#define S2410_EXC_BASE LOCAL_MEM_LOCAL_ADRS +0x100#define S2410_INT_NUM_LEVELS 32/*definitions for LED test*/#define GPIOLED0 0x00000020#define GPIOLED1 0x00000040#define GPIOLED2 0x00000080#define GPIOLED3 0x00000100#define ALL_GPIOLED (GPIOLED0|GPIOLED1|GPIOLED2|GPIOLED3)/*#include "integrator.h"*/#include "s3c2410.h"#define BSP_VTS#undef BSP_VTS#ifdef BSP_VTS/*************************************************** * Add these defines for the Validation Test Suite * ***************************************************/#define INCLUDE_SHELL#define INCLUDE_RLOGIN#define INCLUDE_SHOW_ROUTINES#define INCLUDE_NET_SYM_TBL#define INCLUDE_LOADER#define INCLUDE_PING#define INCLUDE_NET_SHOW#endif /*BSP_VTS*/#undef INCLUDE_WINDML /* define to include windML support *//* Add user application */#ifndef _ASMLANGUAGEIMPORT void usrAppInit(void);#define INCLUDE_USER_APPL#define USER_APPL_INIT usrAppInit() #endif /* _ASMLANGUAGE */#ifdef __cplusplus}#endif#endif /* INCconfigh */#if defined(PRJ_BUILD)#include "prjParams.h"#endif
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