config.h

Tornado的源代码资源包

/* config.h - ARM Integrator configuration header */

/* Copyright 1999-2003 ARM Limited */
/* Copyright 1999-2001 Wind River Systems, Inc. */

/*
modification history
--------------------
01q,07feb03,jb   Removing unwanted define
01p,04feb03,jb   Adding ARM10 support
01o,15jul02,m_h  WindML support, C++ protection
01n,22may02,m_h  Reduce ROM_SIZE for boards with 32 meg RAM (77901)
01m,15may02,m_h  INCLUDE_SHELL, etc are for BSP validation (75760, 75904)
01l,09oct01,jpd  corrected RAM_HIGH_ADRS and LOCAL_MEM_SIZE for integrator946.
                 bump revision number to /5
01k,03oct01,jpd  added support for Integrator 946es/946es_t.
01j,02may01,rec  bump revision number, fix 559 initialization problem
01m,01nov01,t_m  merge in 946 updates
01l,22oct01,jb  Setting MMU_BASIC as default for builds of cpus with MMU
01k,15oct01,jb  New assembly macros are in h/arch/arm/arm.h
01l,09oct01,jpd  corrected RAM_HIGH_ADRS and LOCAL_MEM_SIZE for integrator946.
01k,03oct01,jpd  added support for Integrator 946es/946es_t.
01j,02may01,rec  bump revision number, fix 559 initialization problem
01i,27apr01,rec  add support for 966
01h,25jan01,jmb  remove INCLUDE_MIILIB
01g,15dec00,rec  change RAM_HIGH_ADRS
01f,21nov00,jpd  added support for Intel Ethernet driver.
01e,17feb00,jpd  added define of INCLUDE_FLASH_SIB_FOOTER; raised RAM_HIGH_ADRS.
01d,07feb00,jpd  added support for ARM720T and ARM920T.
01c,13jan00,pr	 add support for Integrator 740T/740T_T.
01b,07dec99,pr	 add DEC and PCI support.
01a,05nov99,ajb  copied from PID BSP version 01p.
*/

/*
This module contains the configuration parameters for the ARM Integrator BSP.
*/

#ifndef	INCconfigh
#define	INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1     1       /* 1.2 is backwards compatible with 1.1 */
#define BSP_VER_1_2     1
#define BSP_VERSION	"1.2"
#define BSP_REV		"/0"	/* 0 for first revision */

#include "configAll.h"


#define NAND_BOOT           /* by jkuang */
#define USER_EXTENSIONS     /* by jkuang */
#undef USER_EXTENSIONS

#undef RAM_SIM
/*
 * STANDALONE_NET must be defined for network debug with
 * standalone vxWorks
 */
#undef STANDALONE_NET

/*
 * Define SERIAL_DEBUG to enable debugging
 * via the serial ports
 */
#undef SERIAL_DEBUG


#define DEFAULT_BOOT_LINE \
"Sczxg(0,0) host:vxWorks.2410bp h=192.168.0.42 e=192.168.0.73:ffffff00 u=target pw=9"

/* Memory configuration */

#undef	LOCAL_MEM_AUTOSIZE			/* run-time memory sizing */
#define USER_RESERVED_MEM	0x1000		/* see sysMemTop() */

/*
 * Local-to-Bus memory address constants:
 * the local memory address always appears at 0 locally;
 * it is not dual ported.
 */

#if defined(CPU_946ES) || defined(CPU_946ES_T)
#define LOCAL_MEM_LOCAL_ADRS	0x00100000	/* fixed at 1Mbyte after TCM */
#define LOCAL_MEM_BUS_ADRS	0x00100000	/* fixed at 1Mbyte after TCM */
#define LOCAL_MEM_SIZE		0x00700000	/* 7 Mbytes after TCM */
#elif defined(CPU_966ES) || defined(CPU_966ES_T)
#  define LOCAL_MEM_LOCAL_ADRS	0x08000000	/* fixed at 0x08000000 */
#  define LOCAL_MEM_BUS_ADRS	0x08000000	/* fixed at 0x08000000 */
#define LOCAL_MEM_SIZE		0x00800000	/* 8 Mbytes */
#elif defined(CPU_1020E) || defined(CPU_1022E)
#define LOCAL_MEM_LOCAL_ADRS	0x00000000	/* fixed at 2Mbyte after TCM */
#define LOCAL_MEM_BUS_ADRS	0x00000000	/* fixed at 2Mbyte after TCM */
#define LOCAL_MEM_SIZE		0x01000000 + INTEGRATOR_HDR_SSRAM_SIZE	/* 16 Mbytes after TCM */
#define INTEGRATOR_EARLY_I_CACHE_ENABLE		/* Enable Early I-Cache */
#define INTEGRATOR_CONSERVE_VIRTUAL_SPACE	/* The speeds up boot significantly */
#define LOCAL_MEM_AUTOSIZE			/* Enable AUTOSIZE */
#else
#define LOCAL_MEM_LOCAL_ADRS	0x31000000	/* fixed at zero */
#define LOCAL_MEM_BUS_ADRS	0x31000000	/* fixed at zero */
#define LOCAL_MEM_SIZE		0x03000000/* 0x04000000	64 Mbytes */
#endif
#define LOCAL_MEM_END_ADRS	(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE)


/*
 * Boot ROM is an image written into Flash. Part of the Flash can be
 * reserved for boot parameters etc. (see the Flash section below).
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM/EPROM.
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to
 *		the VxWorks image (block size - size of headers)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 * 		 (e.g. in uncompressed boot ROM)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile.
 */

#define ROM_BASE_ADRS       0x00000000     /* base of Flash/EPROM */
#define ROM_TEXT_ADRS       ROM_BASE_ADRS  /* code start addr in ROM */
#define ROM_SIZE            0x00800000     /* size of ROM holding VxWorks*/

#define ROM_COPY_SIZE       ROM_SIZE
#define ROM_SIZE_TOTAL      0x00800000	/* total size of ROM */

#if defined(CPU_946ES) || defined(CPU_946ES_T)
#  define RAM_LOW_ADRS		0x00101000	/* VxWorks image entry point */
#  define RAM_HIGH_ADRS		0x00600000	/* RAM address for ROM boot */
#elif defined(CPU_966ES) || defined(CPU_966ES_T)
#  define RAM_LOW_ADRS		0x08001000	/* VxWorks image entry point */
#  define RAM_HIGH_ADRS		0x08600000	/* RAM address for ROM boot */
#elif defined(CPU_1020E) || defined(CPU_1022E)
#  define RAM_LOW_ADRS		0x00201000	/* VxWorks image entry point */
#  define RAM_HIGH_ADRS		0x00600000	/* RAM address for ROM boot */
#else
#  define RAM_LOW_ADRS		0x31010000	/* VxWorks image entry point */
#  define RAM_HIGH_ADRS		0x32000000	/* RAM address for ROM boot */
#endif


/*
 * Count for a CPU delay loop at the beginning of romInit. There have been
 * reports of problems with certain boards and certain power supplies, and
 * adding a delay at the start of romInit appears to help with this. This
 * value may need tuning for different board/PSU combinations.
 */

#define INTEGRATOR_DELAY_VALUE	0x1000


/*
 * Flash/NVRAM memory configuration
 *
 * A block of the Flash memory (FLASH_SIZE bytes at FLASH_ADRS) is
 * reserved for non-volatile storage of data.
 *
 * See also integrator.h
 */

#undef INCLUDE_FLASH

#ifdef INCLUDE_FLASH
#define FLASH_SIZE		0x00020000	/* one 128kbyte block of Flash*/
#define NV_RAM_SIZE		0x100		/* how much we use as NVRAM */
#undef	NV_BOOT_OFFSET
#define NV_BOOT_OFFSET		0		/* bootline at start of NVRAM */
#define FLASH_NO_OVERLAY			/* do not read-modify-write all
						 * of Flash */
#define INCLUDE_FLASH_SIB_FOOTER		/* add a SIB footer to block */
#else	/* INCLUDE_FLASH */
#define NV_RAM_SIZE		NONE

#endif	/* INCLUDE_FLASH */


/* Serial port configuration */

#define INCLUDE_SERIAL

#define UART_XTAL_FREQ	PCLK
#define N_SIO_CHANNELS	N_2410BP_UART_CHANNELS
#define N_2410BP_UART_CHANNELS	2


#undef	NUM_TTY
#define NUM_TTY			N_SIO_CHANNELS


#undef  CONSOLE_BAUD_RATE	
#define CONSOLE_BAUD_RATE	115200	/* console baud rate */
#undef	CONSOLE_TTY		
#define	CONSOLE_TTY		0      	/* console channel */

/*
 * Define SERIAL_DEBUG to enable debugging
 * via the serial ports
 */

 #ifdef SERIAL_DEBUG
 


  #define WDB_NO_BAUD_AUTO_CONFIG

  #undef WDB_COMM_TYPE
  #undef WDB_TTY_BAUD
  #undef WDB_TTY_CHANNEL
  #undef WDB_TTY_DEV_NAME

  #define WDB_COMM_TYPE       WDB_COMM_SERIAL /* WDB in Serial mode */
  #define WDB_TTY_BAUD        115200          /* Baud rate for WDB Connection */
  #define WDB_TTY_CHANNEL     1               /* COM PORT #2 */
  #define WDB_TTY_DEV_NAME    "/tyCo/1"       /* default TYCODRV_5_2 device name */
 #endif /* SERIAL_DEBUG */


/*
 * Cache/MMU configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 */

#if defined(CPU_720T)  || defined(CPU_720T_T) || \
    defined(CPU_740T)  || defined(CPU_740T_T) || \
    defined(CPU_920T)  || defined(CPU_920T_T) || \
    defined(CPU_940T)  || defined(CPU_940T_T) || \
    defined(CPU_946ES) || defined(CPU_946ES_T) || \
    defined(CPU_1020E) || defined(CPU_1022E)

/*
 * We use the generic architecture libraries, with caches/MMUs present. A
 * call to sysHwInit0() is needed from within usrInit before
 * cacheLibInit() is called.
 */

#ifndef _ASMLANGUAGE
IMPORT void sysHwInit0 (void);
#endif
#define INCLUDE_SYS_HW_INIT_0
#define SYS_HW_INIT_0()         sysHwInit0 ()

#endif /* defined(720T/740T/920T/940T/946ES/1020E/1022E) */

#if defined(CPU_720T) || defined(CPU_720T_T) || \
    defined(CPU_740T) || defined(CPU_740T_T) || \