📄 test.c
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/* 北京精仪达盛科技有限公司
Techshine
www.techshine.com */
#include "Config1cfg.h"
#include <stdio.h>
#include <c6x.h>
#include "c6211dsk.h"
#include <csl_pll.h>
#include <csl.h>
int delay=200;
void startPLL();
void wait();
void mem_test();
void main()
{
startPLL();
/* EMIF interface configuration */
*(unsigned volatile int *)EMIF_GCR = 0x3778; /* EMIF global control */
*(unsigned volatile int *)EMIF_CE1 = 0xffffff03;
*(unsigned volatile int *)EMIF_SDCTRL = 0x57115000; /* EMIF SDRAM control */
*(unsigned volatile int *)EMIF_CE0 = 0x30; /* EMIF CE0 control */
*(unsigned volatile int *)EMIF_CE2 = 0x30; /* EMIF CE0 control */
*(unsigned volatile int *)EMIF_SDRP = 0x578; /* EMIF SDRM refresh period */
*(unsigned volatile int *)EMIF_SDEXT = 0x54529; /* EMIF SDRM extension */
mem_test(0x12345680,0x80000000,0xff);
*(unsigned volatile int *)IO_PORT = 0x00; /* Turn off all user LEDs*/
*(unsigned volatile int *)IO_PORT = 0x0D; /* Display test # on LEDs */
}
void startPLL()
{
PLL_bypass();
wait();
PLL_reset();
wait();
PLL_setPllRatio(PLL_DIV0,0x00); /* DIVD0 */
PLL_enablePllDiv(PLL_DIV0);
PLL_setMultiplier(2); /* Multiply by the number */
PLL_setOscRatio(0x4);
PLL_enableOscDiv();
wait();
// PLL_operational();
PLL_setPllRatio(PLL_DIV1,0x02); /* dsp core divide bu the number+1*/
PLL_enablePllDiv(PLL_DIV1);
wait();
PLL_setPllRatio(PLL_DIV2,0x05); /* peripheral sysclk2 divide by the number+1*/
PLL_enablePllDiv(PLL_DIV2);
wait();
PLL_setPllRatio(PLL_DIV3,0x04); /* sysclk3 divide bu the number+1*/
PLL_enablePllDiv(PLL_DIV3);
wait();
wait();
PLL_deassert();
wait();
wait();
PLL_enable();
wait();
wait();
return;
}
void mem_test (int pattern, int start_address, int size_in_word )
{
int i;
int *mem_ptr = (int *)start_address;
for(i=0;i<size_in_word;i++)
{
*mem_ptr++ = pattern;
}
}
void wait()
{
int i;
for(i=0;i<delay;i++){}
return;
}
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