rtc.s

pxa255,bootloaer ,从初始化中断到GPIO口

;/*************************************************************
;*****************Real-Time Clock Register*********************
;*************************************************************/
RCNR 		EQU		0x40900000 		;RTC Counter Register
RCNR_Value	EQU		0x00000000

RTAR		EQU		0x40900004 		;RTC Alarm Register
RTAR_Value	EQU		0x00000000

RTSR 		EQU		0x40900008 		;RTC Status Register
AL			EQU		(0x0<<0)		;RTC alarm detected.
HZ			EQU		(0x0<<1)		;HZ rising-edge detected.
ALE			EQU		(0x0<<2)		;RTC alarm interrupt enable.
HZE			EQU		(0x0<<3)		;HZ interrupt enable.
RTSR_Value	EQU		(AL+HZ+ALE+HZE)

RTTR		EQU		0x4090000c 		;RTC Trim Register
CKDIV0		EQU		(0x1<<0)	;Clock divider count.
CKDIV1		EQU		(0x1<<1)	;/*This value is the number 
CKDIV2		EQU		(0x1<<2)	;	of 32 kHz clock cycles, 
CKDIV3		EQU		(0x1<<3)	;	plus 1, per HZ clock cycle.*/
CKDIV4		EQU		(0x1<<4)
CKDIV5		EQU		(0x1<<5)
CKDIV6		EQU		(0x1<<6)
CKDIV7		EQU		(0x1<<7)
CKDIV8		EQU		(0x1<<8)
CKDIV9		EQU		(0x1<<9)
CKDIV10		EQU		(0x1<<10)
CKDIV11		EQU		(0x1<<11)
CKDIV12		EQU		(0x1<<12)
CKDIV13		EQU		(0x1<<13)
CKDIV14		EQU		(0x1<<14)
CKDIV15		EQU		(0x0<<15)
DEL16		EQU		(0x0<<16)	; Trim delete count.
DEL17		EQU		(0x0<<17)	;/*	This value represents 
DEL18		EQU		(0x0<<18)	;	the number of 32 kHz 
DEL19		EQU		(0x0<<19)	;	clocks to delete when 
DEL20		EQU		(0x0<<20)	;	clock trimming begins.*/
DEL21		EQU		(0x0<<21)
DEL22		EQU		(0x0<<22)
DEL23		EQU		(0x0<<23)
DEL24		EQU		(0x0<<24)
DEL25		EQU		(0x0<<25)
LCK			EQU		(0x0<<31)	;Locking bit for the trim value.
								;if LCK=0x0,allowed to be altered.
								;if LCK=0x1,not allowed to be altered.
								
RTTR_Value	EQU		(CKDIV0|CKDIV1|CKDIV2|CKDIV3|CKDIV4|CKDIV5|CKDIV6|CKDIV7|CKDIV8|CKDIV9|CKDIV10|CKDIV11|CKDIV12|CKDIV13|CKDIV14|CKDIV15|DEL16|DEL17|DEL18|DEL19|DEL20|DEL21|DEL22|DEL23|DEL24|DEL25|LCK)


			END