📄 davincievm.h
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#define AEMIF_NANDECC2 *( volatile Uint32* )( AEMIF_BASE + 0x70 )
#define AEMIF_NANDECC3 *( volatile Uint32* )( AEMIF_BASE + 0x74 )
#define AEMIF_NANDECC4 *( volatile Uint32* )( AEMIF_BASE + 0x78 )
#define AEMIF_NANDECC5 *( volatile Uint32* )( AEMIF_BASE + 0x7C )
/* ------------------------------------------------------------------------ *
* *
* PWM Controller *
* *
* ------------------------------------------------------------------------ */
#define PWM0_BASE 0x01C22000
#define PWM0_PID *( volatile Uint32* )( PWM0_BASE + 0x00 )
#define PWM0_PCR *( volatile Uint32* )( PWM0_BASE + 0x04 )
#define PWM0_CFG *( volatile Uint32* )( PWM0_BASE + 0x08 )
#define PWM0_START *( volatile Uint32* )( PWM0_BASE + 0x0C )
#define PWM0_RPT *( volatile Uint32* )( PWM0_BASE + 0x10 )
#define PWM0_PER *( volatile Uint32* )( PWM0_BASE + 0x14 )
#define PWM0_PH1D *( volatile Uint32* )( PWM0_BASE + 0x18 )
/* ------------------------------------------------------------------------ *
* *
* Timer Controller *
* *
* ------------------------------------------------------------------------ */
#define TIMER0_BASE 0x01C21400
#define TIMER0_EMUMGT *( volatile Uint32* )( TIMER0_BASE + 0x04 )
#define TIMER0_TIM12 *( volatile Uint32* )( TIMER0_BASE + 0x10 )
#define TIMER0_TIM34 *( volatile Uint32* )( TIMER0_BASE + 0x14 )
#define TIMER0_PRD12 *( volatile Uint32* )( TIMER0_BASE + 0x18 )
#define TIMER0_PRD34 *( volatile Uint32* )( TIMER0_BASE + 0x1C )
#define TIMER0_TRC *( volatile Uint32* )( TIMER0_BASE + 0x20 )
#define TIMER0_TGCR *( volatile Uint32* )( TIMER0_BASE + 0x24 )
#define TIMER1_BASE 0x01C21800
#define TIMER1_EMUMGT *( volatile Uint32* )( TIMER1_BASE + 0x04 )
#define TIMER1_TIM12 *( volatile Uint32* )( TIMER1_BASE + 0x10 )
#define TIMER1_TIM34 *( volatile Uint32* )( TIMER1_BASE + 0x14 )
#define TIMER1_PRD12 *( volatile Uint32* )( TIMER1_BASE + 0x18 )
#define TIMER1_PRD34 *( volatile Uint32* )( TIMER1_BASE + 0x1C )
#define TIMER1_TRC *( volatile Uint32* )( TIMER1_BASE + 0x20 )
#define TIMER1_TGCR *( volatile Uint32* )( TIMER1_BASE + 0x24 )
#define TIMER2_BASE 0x01C21C00
#define TIMER2_EMUMGT *( volatile Uint32* )( TIMER2_BASE + 0x04 )
#define TIMER2_TIM12 *( volatile Uint32* )( TIMER2_BASE + 0x10 )
#define TIMER2_TIM34 *( volatile Uint32* )( TIMER2_BASE + 0x14 )
#define TIMER2_PRD12 *( volatile Uint32* )( TIMER2_BASE + 0x18 )
#define TIMER2_PRD34 *( volatile Uint32* )( TIMER2_BASE + 0x1C )
#define TIMER2_TRC *( volatile Uint32* )( TIMER2_BASE + 0x20 )
#define TIMER2_TGCR *( volatile Uint32* )( TIMER2_BASE + 0x24 )
/* ------------------------------------------------------------------------ *
* *
* UART Controller *
* *
* ------------------------------------------------------------------------ */
#define UART0_BASE 0x01C20000
#define UART0_RBR *( volatile Uint32* )( UART0_BASE + 0x00 )
#define UART0_THR *( volatile Uint32* )( UART0_BASE + 0x00 )
#define UART0_IER *( volatile Uint32* )( UART0_BASE + 0x04 )
#define UART0_IIR *( volatile Uint32* )( UART0_BASE + 0x08 )
#define UART0_FCR *( volatile Uint32* )( UART0_BASE + 0x08 )
#define UART0_LCR *( volatile Uint32* )( UART0_BASE + 0x0c )
#define UART0_MCR *( volatile Uint32* )( UART0_BASE + 0x10 )
#define UART0_LSR *( volatile Uint32* )( UART0_BASE + 0x14 )
#define UART0_DLL *( volatile Uint32* )( UART0_BASE + 0x20 )
#define UART0_DLH *( volatile Uint32* )( UART0_BASE + 0x24 )
#define UART0_PID1 *( volatile Uint32* )( UART0_BASE + 0x28 )
#define UART0_PID2 *( volatile Uint32* )( UART0_BASE + 0x2C )
#define UART0_PWREMU_MGMT *( volatile Uint32* )( UART0_BASE + 0x30 )
#define UART1_BASE 0x01C20400
#define UART1_RBR *( volatile Uint32* )( UART1_BASE + 0x00 )
#define UART1_THR *( volatile Uint32* )( UART1_BASE + 0x00 )
#define UART1_IER *( volatile Uint32* )( UART1_BASE + 0x04 )
#define UART1_IIR *( volatile Uint32* )( UART1_BASE + 0x08 )
#define UART1_FCR *( volatile Uint32* )( UART1_BASE + 0x08 )
#define UART1_LCR *( volatile Uint32* )( UART1_BASE + 0x0c )
#define UART1_MCR *( volatile Uint32* )( UART1_BASE + 0x10 )
#define UART1_LSR *( volatile Uint32* )( UART1_BASE + 0x14 )
#define UART1_DLL *( volatile Uint32* )( UART1_BASE + 0x20 )
#define UART1_DLH *( volatile Uint32* )( UART1_BASE + 0x24 )
#define UART1_PID1 *( volatile Uint32* )( UART1_BASE + 0x28 )
#define UART1_PID2 *( volatile Uint32* )( UART1_BASE + 0x2C )
#define UART1_PWREMU_MGMT *( volatile Uint32* )( UART1_BASE + 0x30 )
#define UART2_BASE 0x01C20800
#define UART2_RBR *( volatile Uint32* )( UART2_BASE + 0x00 )
#define UART2_THR *( volatile Uint32* )( UART2_BASE + 0x00 )
#define UART2_IER *( volatile Uint32* )( UART2_BASE + 0x04 )
#define UART2_IIR *( volatile Uint32* )( UART2_BASE + 0x08 )
#define UART2_FCR *( volatile Uint32* )( UART2_BASE + 0x08 )
#define UART2_LCR *( volatile Uint32* )( UART2_BASE + 0x0c )
#define UART2_MCR *( volatile Uint32* )( UART2_BASE + 0x10 )
#define UART2_LSR *( volatile Uint32* )( UART2_BASE + 0x14 )
#define UART2_DLL *( volatile Uint32* )( UART2_BASE + 0x20 )
#define UART2_DLH *( volatile Uint32* )( UART2_BASE + 0x24 )
#define UART2_PID1 *( volatile Uint32* )( UART2_BASE + 0x28 )
#define UART2_PID2 *( volatile Uint32* )( UART2_BASE + 0x2C )
#define UART2_PWREMU_MGMT *( volatile Uint32* )( UART2_BASE + 0x30 )
/* ------------------------------------------------------------------------ *
* *
* I2C Controller *
* *
* ------------------------------------------------------------------------ */
#define I2C_BASE 0x1c21000
#define I2C_OAR *( volatile Uint32* )( I2C_BASE + 0x00 )
#define I2C_ICIMR *( volatile Uint32* )( I2C_BASE + 0x04 )
#define I2C_ICSTR *( volatile Uint32* )( I2C_BASE + 0x08 )
#define I2C_ICCLKL *( volatile Uint32* )( I2C_BASE + 0x0C )
#define I2C_ICCLKH *( volatile Uint32* )( I2C_BASE + 0x10 )
#define I2C_ICCNT *( volatile Uint32* )( I2C_BASE + 0x14 )
#define I2C_ICDRR *( volatile Uint32* )( I2C_BASE + 0x18 )
#define I2C_ICSAR *( volatile Uint32* )( I2C_BASE + 0x1C )
#define I2C_ICDXR *( volatile Uint32* )( I2C_BASE + 0x20 )
#define I2C_ICMDR *( volatile Uint32* )( I2C_BASE + 0x24 )
#define I2C_ICIVR *( volatile Uint32* )( I2C_BASE + 0x28 )
#define I2C_ICEMDR *( volatile Uint32* )( I2C_BASE + 0x2C )
#define I2C_ICPSC *( volatile Uint32* )( I2C_BASE + 0x30 )
#define I2C_ICPFUNC *( volatile Uint32* )( I2C_BASE + 0x48 )
#define I2C_ICPDIR *( volatile Uint32* )( I2C_BASE + 0x4C )
#define I2C_ICPDIN *( volatile Uint32* )( I2C_BASE + 0x50 )
#define I2C_ICPDOUT *( volatile Uint32* )( I2C_BASE + 0x54 )
#define I2C_ICPDSET *( volatile Uint32* )( I2C_BASE + 0x58 )
#define I2C_ICPDCLR *( volatile Uint32* )( I2C_BASE + 0x5C )
/* I2C Field Definitions */
#define ICOAR_MASK_7 0x007F
#define ICOAR_MASK_10 0x03FF
#define ICSAR_MASK_7 0x007F
#define ICSAR_MASK_10 0x03FF
#define ICOAR_OADDR 0x007f
#define ICSAR_SADDR 0x0050
#define ICSTR_BB 0x1000
#define ICSTR_RSFULL 0x0800
#define ICSTR_XSMT 0x0400
#define ICSTR_AAS 0x0200
#define ICSTR_AD0 0x0100
#define ICSTR_ICXRDY 0x0010
#define ICSTR_ICRRDY 0x0008
#define ICSTR_ARDY 0x0004
#define ICSTR_NACK 0x0002
#define ICSTR_AL 0x0001
#define ICMDR_FREE 0x4000
#define ICMDR_STT 0x2000
#define ICMDR_IDLEEN 0x1000
#define ICMDR_STP 0x0800
#define ICMDR_MST 0x0400
#define ICMDR_TRX 0x0200
#define ICMDR_XA 0x0100
#define ICMDR_RM 0x0080
#define ICMDR_DLB 0x0040
#define ICMDR_IRS 0x0020
#define ICMDR_STB 0x0010
#define ICMDR_FDF 0x0008
#define ICMDR_BC_MASK 0x0007
/* ------------------------------------------------------------------------ *
* *
* MCBSP Controller *
* *
* ------------------------------------------------------------------------ */
#define MCBSP_BASE 0x01E02000
#define MCBSP_DRR_32BIT *( volatile Uint32* )( MCBSP_BASE + 0x00 )
#define MCBSP_DRR_16BIT *( volatile Uint16* )( MCBSP_BASE + 0x00 )
#define MCBSP_DXR_32BIT *( volatile Uint32* )( MCBSP_BASE + 0x04 )
#define MCBSP_DXR_16BIT *( volatile Uint16* )( MCBSP_BASE + 0x04 )
#define MCBSP_SPCR *( volatile Uint32* )( MCBSP_BASE + 0x08 )
#define MCBSP_RCR *( volatile Uint32* )( MCBSP_BASE + 0x0C )
#define MCBSP_XCR *( volatile Uint32* )( MCBSP_BASE + 0x10 )
#define MCBSP_SRGR *( volatile Uint32* )( MCBSP_BASE + 0x14 )
#define MCBSP_MCR *( volatile Uint32* )( MCBSP_BASE + 0x18 )
#define MCBSP_PCR *( volatile Uint32* )( MCBSP_BASE + 0x24 )
#define MCBSP_SPCR_FREE 0x02000000
#define MCBSP_SPCR_SOFT 0x01000000
#define MCBSP_SPCR_FRST 0x00800000
#define MCBSP_SPCR_GRST 0x00400000
#define MCBSP_SPCR_XSYNCERR 0x00080000
#define MCBSP_SPCR_XEMPTY 0x00040000
#define MCBSP_SPCR_XRDY 0x00020000
#define MCBSP_SPCR_XRST 0x00010000
#define MCBSP_SPCR_DLB 0x00008000
#define MCBSP_SPCR_DXENA 0x00000020
#define MCBSP_SPCR_ABIS 0x00000010
#define MCBSP_SPCR_RSYNCERR 0x00000008
#define MCBSP_SPCR_RFULL 0x00000004
#define MCBSP_SPCR_RRDY 0x00000002
#define MCBSP_SPCR_RRST 0x00000001
/* ------------------------------------------------------------------------ *
* *
* Prototypes *
* *
* ------------------------------------------------------------------------ */
Int16 DAVINCIEVM_init( );
Int16 DAVINCIEVM_pll_on( Uint16 pll_number, Uint16 clock_source, Uint16 pll_multipler );
Int16 DAVINCIEVM_psc_all_on( );
Int16 DAVINCIEVM_psc_on( Uint32 domain, Uint32 id );
Int16 DAVINCIEVM_pin_mux_on( Uint32 pinmux0, Uint32 pinmux1 );
Int16 DAVINCIEVM_pin_mux_off( Uint32 pinmux0, Uint32 pinmux1 );
Int16 DAVINCIEVM_aemif_init( Uint32 acfg2, Uint32 acfg3, Uint32 acfg4, Uint32 acfg5 );
void sw_wait( Uint32 delay );
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