_primary.vhd

来自「Multiple Numbers Calculator (source code」· VHDL 代码 · 共 15 行

library verilog;
use verilog.vl_types.all;
entity wallace_tree is
    port(
        \OUT\           : out    vl_logic_vector(26 downto 0);
        p1              : in     vl_logic_vector(26 downto 0);
        p2              : in     vl_logic_vector(26 downto 0);
        p3              : in     vl_logic_vector(26 downto 0);
        p4              : in     vl_logic_vector(26 downto 0);
        p5              : in     vl_logic_vector(26 downto 0);
        p6              : in     vl_logic_vector(26 downto 0);
        p7              : in     vl_logic_vector(26 downto 0)
    );
end wallace_tree;