📄 hw_fd5420.c
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/******************************************************************/
/* Copyright (C) 2007 ROCK-CHIPS FUZHOU . All Rights Reserved. */
/*******************************************************************
File : hw_Fd5420.c
Desc : Mcupanel型号的Mcu驱动
Author : nzy
Date :
Notes :
$Log :
*********************************************************************/
#include "hw_include.h"
#include "hwapi_Mcupanel.h"
#if((LCDPANEL == MCUIF_FD5420_16B)||(LCDPANEL == MCUIF_FD5420_18B))
/*---------------------------------------------------------
Name : Fd5420_PowerOnInit
Desc : 初始化Mcu panel
Return: 状态
Author: LingZJ
Date : 070630
-----------------------------------------------------------*/
void Fd5420_PowerOnInit(void)
{
int i, j;
Mcupanel_RegSet(0x0600, 0x0001);//soft reset
delay_nops(10000);
Mcupanel_RegSet(0x0600, 0x0000);//soft reset
delay_nops(10000);
Mcupanel_RegSet(0x0606, 0x0000);//i80-i/F Endian Control
//===User setting===
Mcupanel_RegSet(0x0001, 0x0000);//Driver Output Control
Mcupanel_RegSet(0x0002, 0x0100);//LCD Driving Wave Control
Mcupanel_RegSet(0x0003, 0x1038);//Entry Mode
Mcupanel_RegSet(0x0006, 0x0000);//Outline Sharpening Control
Mcupanel_RegSet(0x0008, 0x0808);//Sets the number of lines for front/back porch period
Mcupanel_RegSet(0x0009, 0x0001);//Display Control 3
Mcupanel_RegSet(0x000B, 0x0010);//Low Power Control
Mcupanel_RegSet(0x000C, 0x0000);//External Display Interface Control 1
Mcupanel_RegSet(0x000F, 0x0000);//External Display Interface Control 2
Mcupanel_RegSet(0x0400, 0x3100);//Base Image Number of Line
Mcupanel_RegSet(0x0401, 0x0001);//Base Image Display
Mcupanel_RegSet(0x0404, 0x0000);//Base Image Vertical Scroll Control
Mcupanel_RegSet(0x0500, 0x0000);//Partial Image 1: Display Position
Mcupanel_RegSet(0x0501, 0x0000);//RAM Address (Start Line Address)
Mcupanel_RegSet(0x0502, 0x018f);//RAM Address (End Line Address)
Mcupanel_RegSet(0x0503, 0x0000);//Partial Image 2: Display Position RAM Address
Mcupanel_RegSet(0x0504, 0x0000);//RAM Address (Start Line Address)
Mcupanel_RegSet(0x0505, 0x0000);//RAM Address (End Line Address)
//Panel interface control===
Mcupanel_RegSet(0x0010, 0x0011);//Division Ratio,Clocks per Line 14
delay_nops(10000);
Mcupanel_RegSet(0x0011, 0x0202);//Division Ratio,Clocks per Line
Mcupanel_RegSet(0x0012, 0x0300);//Sets low power VCOM drive period.
delay_nops(10000);
Mcupanel_RegSet(0x0020, 0x021e);//Panel Interface Control 4
Mcupanel_RegSet(0x0021, 0x0202);//Panel Interface Control 5
Mcupanel_RegSet(0x0022, 0x0100);//Panel Interface Control 6
Mcupanel_RegSet(0x0090, 0x0000);//Frame Marker Control
Mcupanel_RegSet(0x0092, 0x0000);//MDDI Sub-display Control
//===Gamma setting===
Mcupanel_RegSet(0x0300, 0x0101);//γ Control
Mcupanel_RegSet(0x0301, 0x0000);//γ Control
Mcupanel_RegSet(0x0302, 0x0016);//γ Control
Mcupanel_RegSet(0x0303, 0x2913);//γ Control
Mcupanel_RegSet(0x0304, 0x260B);//γ Control
Mcupanel_RegSet(0x0305, 0x0101);//γ Control
Mcupanel_RegSet(0x0306, 0x1204);//γ Control
Mcupanel_RegSet(0x0307, 0x0415);//γ Control
Mcupanel_RegSet(0x0308, 0x0205);//γ Control
Mcupanel_RegSet(0x0309, 0x0303);//γ Control
Mcupanel_RegSet(0x030A, 0x0E05);//γ Control
Mcupanel_RegSet(0x030B, 0x0D01);//γ Control
Mcupanel_RegSet(0x030C, 0x010D);//γ Control
Mcupanel_RegSet(0x030D, 0x050E);//γ Control
Mcupanel_RegSet(0x030E, 0x0303);//γ Control
Mcupanel_RegSet(0x030F, 0x0502);//γ Control
//===Power on sequence===
Mcupanel_RegSet(0x0007, 0x0001);//Display Control 1
Mcupanel_RegSet(0x0110, 0x0001);//Power supply startup enable bit
Mcupanel_RegSet(0x0112, 0x0060);//Power Control 7
delay_nops(50000);
Mcupanel_RegSet(0x0100, 0x16B0);//Power Control 1
delay_nops(10000);
Mcupanel_RegSet(0x0101, 0x0147);//Power Control 2
delay_nops(10000);
Mcupanel_RegSet(0x0102, 0x0119);//Starts VLOUT3,Sets the VREG1OUT.
delay_nops(10000);
Mcupanel_RegSet(0x0103, 0x2f00);//set the amplitude of VCOM
delay_nops(50000);
Mcupanel_RegSet(0x0282, 0x0090);//VCOMH voltage
delay_nops(10000);
Mcupanel_RegSet(0x0281, 0x000A);//Selects the factor of VREG1OUT to generate VCOMH.
Mcupanel_RegSet(0x0102, 0x01BE);//Starts VLOUT3,Sets the VREG1OUT.
delay_nops(10000);
//Address
Mcupanel_RegSet(0x0210, 0x0000);//Window Horizontal RAM Address Start
Mcupanel_RegSet(0x0211, 0x00ef);//Window Horizontal RAM Address End
Mcupanel_RegSet(0x0212, 0x0000);//Window Vertical RAM Address Start
Mcupanel_RegSet(0x0213, 0x018f);//Window Vertical RAM Address End
Mcupanel_RegSet(0x0200, 0x0000);//RAM Address Set (Horizontal Address)
Mcupanel_RegSet(0x0201, 0x0000);//RAM Address Set (Vertical Address)
//===Display_On_Function===
Mcupanel_RegSet(0x0007, 0x0021);//Display Control 1
delay_nops(40000);
Mcupanel_RegSet(0x0007, 0x0061);//Display Control 1
delay_nops(100000);
Mcupanel_RegSet(0x0007, 0x0173);//Display Control 1
delay_nops(300000);
Mcupanel_Command(0x0202); //Write Data to GRAM
for (i = 0; i < 400; i++)
{
for (j = 0; j < 240; j++)
{
Mcupanel_Data(0x000000);
}
}
}
/*---------------------------------------------------------
Name : Fd5420_Standby
Desc :
Return:
Author: nzy
Date :
-----------------------------------------------------------*/
void Fd5420_Standby(MCULCDSTATUS Enable)
{
if (Enable == MCU_STANDBY)//Standby mode
{
//进入Standby 模式
Mcupanel_RegSet(0x0007, 0x0170);
delay_nops(50);
Mcupanel_RegSet(0x0007, 0x0000);//Display off
delay_nops(50);
// Mcupanel_RegSet(0x0100,0x14b2);//Set to deep sleep mode
Mcupanel_RegSet(0x0100, 0x14b4); // set to stand by mode
Mcupanel_Command(0x0202);
}
else//Return normal
{
// 从stand by 模式下返回
Mcupanel_RegSet(0x0100, 0x14b0);//State mode release
delay_nops(50);
Mcupanel_RegSet(0x0007, 0x0173);//Display on
Mcupanel_Command(0x0202);
}
}
/*---------------------------------------------------------
Name : Fd5420_ScanDirSet
Desc : Mcupanel扫描方向设置
Params: XSize -> X方向的宽度
YSize -> Y方向的高度
Return:
Author: nzy
Date :
-----------------------------------------------------------*/
void Fd5420_ScanDirSet(UINT16 XSize, UINT16 YSize)
{
}
#endif
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