hw_i2sctrl.h

瑞星微公司RK27XX系列芯片的SDK开发包

/****************************************************************
 Copyright (C) 2007 RockChip All Rights Reserved.

File: HW_I2sCtrl.h
Desc: I2S control
Author:LingZJ
Date: 2007/06/30
note:
$Log: HW_I2sCtrl.h,v $
Revision 1.3  2007/10/15 09:16:04  Huangxinyu
根据RK27提交修改driver

Revision 1.2  2007/10/08 02:38:44  Lingzhaojun
添加版本自动注释脚本

Revision 1.1.1.1  2007/09/27 09:06:01  cvsadmin
no message

*****************************************************************/

#ifndef _HW_IIS_H_
#define _HW_IIS_H_


#define RegI2sBase  APB0_I2S_BASE  // 0x18028000

#define RegI2s_OPR  RegI2sBase+0x00
#define RegI2s_TXR  RegI2sBase+0x04
#define RegI2s_RXR  RegI2sBase+0x08
#define RegI2s_TXCTL RegI2sBase+0x0c
#define RegI2s_RXCTL RegI2sBase+0x10
#define RegI2s_FIFOSTS RegI2sBase+0x14
#define RegI2s_IER  RegI2sBase+0x18
#define RegI2s_ISR  RegI2sBase+0x1c

//  OPR register
#define Reset_Tx                (0x01<<17)
#define Reset_Rx                (0x01<<16)

#define Reg1_enable           (0x00<<6)
#define Req1_disable            (0x01<<6)

#define Reg2_enable           (0x00<<5)
#define Req2_disable            (0x01<<5)

#define Req1_Tx                 (0x00<<4)
#define Req1_Rx                 (0x01<<4)

#define Req2_Tx                 (0x00<<3)
#define Req2_Rx                 (0x01<<3)

#define Tx_start         (0x01<<1)
#define Rx_start         (0x01<<0)

//  CTL register
#define Clear_RxFIFO        (0x01<<24)

#define LRCK_rate32         (0x00<<16)
#define LRCK_rate64         (0x01<<16)
#define LRCK_rate128       (0x02<<16)

#define SCK_rate2               (0x02<<8)
#define SCK_rate4               (0x04<<8)
#define SCK_rate8               (0x08<<8)

#define Sample_8bit            (0x00<<4)
#define Sample_16bit          (0x01<<4)

#define Stereo_mode           (0x00<<3)
#define Mono_mode             (0x01<<3)

#define IF_I2S                      (0x00<<1)
#define IF_Left                     (0x01<<1)
#define IF_Right                   (0x02<<1)

#define Master_mode         (0x01<<0)
#define Slave_mode         (0x00<<0)

//  FIFO STS
#define Tx_AlmostEmpty          (0x00<<18)
#define Tx_HalfFull                   (0x01<<18)
#define Tx_AlmostFull               (0x02<<18)

#define Rx_AlmostEmpty          (0x00<<16)
#define Rx_HalfFull                   (0x01<<16)
#define Rx_AlmostFull               (0x02<<16)

// macro
#define HW_I2sResetTx()              SetRegBit32(RegI2s_OPR, 17)
#define HW_I2sResetRx()              SetRegBit32(RegI2s_OPR, 16)
#define HW_I2sEnHDMA1()      ClrRegBit32(RegI2s_OPR, 6)
#define HW_I2sEnHDMA2()      ClrRegBit32(RegI2s_OPR, 5)
#define HW_I2sDisHDMA1()     SetRegBit32(RegI2s_OPR, 6)
#define HW_I2sDisHDMA2()     SetRegBit32(RegI2s_OPR, 5)
#define HW_I2sHDMA_REQ1_TX()    ClrRegBit32(RegI2s_OPR, 4)
#define HW_I2sHDMA_REQ1_RX()    SetRegBit32(RegI2s_OPR, 4)
#define HW_I2sHDMA_REQ2_TX()    ClrRegBit32(RegI2s_OPR, 3)
#define HW_I2sHDMA_REQ2_RX()    SetRegBit32(RegI2s_OPR, 3)
#define HW_I2sMstTxStart()         SetRegBit32(RegI2s_OPR, 1)
#define HW_I2sMstRxStart()         SetRegBit32(RegI2s_OPR, 0)

#define HW_I2sTxMasterEn()     SetRegBit32(RegI2s_TXCTL, 0)
#define HW_I2sTxSlaveEn()     ClrRegBit32(RegI2s_TXCTL, 0)

#define HW_I2sTxMonoEn()      SetRegBit32(RegI2s_TXCTL, 3)
#define HW_I2sTxStereoEn()     ClrRegBit32(RegI2s_TXCTL, 3)

#define HW_I2sRxMasterEn()     SetRegBit32(RegI2s_RXCTL, 0)
#define HW_I2sRxSlaveEn()     ClrRegBit32(RegI2s_RXCTL, 0)
#define HW_I2sRxMonoEn()      SetRegBit32(RegI2s_RXCTL, 3)
#define HW_I2sRxStereoEn()     ClrRegBit32(RegI2s_RXCTL, 3)



//操作模式
#define I2sMode_Master   (1<<0)
#define I2sMode_Slave   (1<<1)
#define I2sMode_Req1En   (1<<2)
#define I2sMode_Req2En   (1<<3)
#define I2sMode_Req1Tx   (1<<4)
#define I2sMode_Req1Rx   (1<<5)
#define I2sMode_Req2Tx   (1<<6)
#define I2sMode_Req2Rx   (1<<7)
#define I2sMode_MasterTxStart (1<<8)
#define I2sMode_MasterRxStart (1<<9)
#define I2sMode_32FS   (1<<14)
#define I2sMode_64FS   (1<<15)
#define I2sMode_128FS   (1<<16)
#define I2sMode_8bit   (1<<17)
#define I2sMode_16bit   (1<<18)
#define I2sMode_Mono   (1<<21)
#define I2sMode_Stereo   (1<<22)
#define I2sMode_BusI2S   (1<<23)
#define I2sMode_BusLeftJust  (1<<24)
#define I2sMode_BusReghtJust (1<<25)
#define I2sMode_Tx    (1<<26)
#define I2sMode_Rx    (1<<27)




#endif      //_HW_IIS_H_