dm9000a.h

DM900A driver for au1200(Eboot using)

/*************************************************************************
*
* [FILE NAME]
*   dm9000a.h
*
* [VERSION]
*   Ver 1.0
*
* [DESCRIPTION]
*   Head file of dm9000a.c.
* 
* [COPYRIGHT]
*       Copyright (c) AMD Beijing Technology Development Center. 
*
* PROPRIETARY RIGHTS of AMD Beijing Technology Development Center
* are involved in the subject matter of this material.  All manufacturing, 
* reproduction, use, and sales rights pertaining to this subject matter are 
* governed by the license agreement.  The recipient of this software implicitly
* accepts the terms of the license. 
*
* [HISTORY]
* NAME              DATE        REMARKS               
* 
*
*************************************************************************/
/*===== Begin ==========*/
#ifndef         _DM9000A_H
#define         _DM9000A_H

/*===== Include ========*/

/*====== Define ======*/

#define DM9000_ID		0x90000a46
#define DM9000_PHY		0x40

//DM9000 register offset

#define DM9000_NCR			0x00
#define DM9000_NSR			0x01
#define DM9000_TCR			0x02
#define DM9000_TSR1			0x03
#define DM9000_TSR2			0x04
#define DM9000_RCR			0x05
#define DM9000_RSR			0x06
#define DM9000_ROCR		0x07
#define DM9000_BPTR			0x08
#define DM9000_FCTR			0x09
#define DM9000_FCR			0x0a
#define DM9000_EPCR			0x0b
#define DM9000_EPAR		0x0c
#define DM9000_EPDRL		0x0d
#define DM9000_EPDRH		0x0e
#define DM9000_WCR			0x0f

#define DM9000_PAR			0x10
#define DM9000_MAR			0x16
#define DM9000_GPCR		0x1e
#define DM9000_GPR			0x1f

#define DM9000_TRPAL		0x22
#define DM9000_TRPAH		0x23
#define DM9000_RWPAL		0x24
#define DM9000_RWPAH		0x25
#define DM9000_VID			0x28
#define DM9000_PID			0x2a
#define DM9000_CHIPR		0x2c
#define DM9000_TCR2			0x2d
#define DM9000_OCR			0x2e
#define DM9000_SMCR		0x2f

#define DM9000_ETXCSR		0x30
#define DM9000_TCSCR		0x31
#define DM9000_RCSCSR		0x32
#define DM9000_MPAR		0x33
#define DM9000_LEDCR		0x34
#define DM9000_BUSCR		0x38
#define DM9000_INTCR		0x39
	
#define DM9000_SCCR			0x50
#define DM9000_RSCCR		0x51

#define DM9000_MRCMDX		0xf0
#define DM9000_MRCMD		0xf2
#define DM9000_MRRL		0xf4
#define DM9000_MRRH		0xf5
#define DM9000_MWCMDX		0xf6
#define DM9000_MWCMD		0xf8
#define DM9000_MWRL		0xfa
#define DM9000_MWRH		0xfb
#define DM9000_TXPLL		0xfc
#define DM9000_TXPLH		0xfd
#define DM9000_ISR			0xfe
#define DM9000_IMR			0xff

#define DM9000_DISABLE_INT			0x80
#define DM9000_ENABLE_INT			0x81

/*====== Struct ======*/


/*====== Variable ======*/


/*====== Function Prototype ======*/


/*===== End ============*/

#endif